Commit d86b9c57 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm: move msm_gpummu.c to adreno/a2xx_gpummu.c 



The msm_gpummu.c implementation is used only on A2xx and it is tied to
the A2xx registers. Rename the source file accordingly.

Reviewed-by: default avatarAkhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/585846/
Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-4-4bdb277a85a1@linaro.org
parent 53f72c19

drivers/gpu/drm/msm/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ msm-y := \ 
	adreno/adreno_device.o \

	adreno/adreno_gpu.o \

	adreno/a2xx_gpu.o \

	adreno/a2xx_gpummu.o \

	adreno/a3xx_gpu.o \

	adreno/a4xx_gpu.o \

	adreno/a5xx_gpu.o \
@@ -113,7 +114,6 @@ msm-y += \ 
	msm_ringbuffer.o \

	msm_submitqueue.o \

	msm_gpu_tracepoints.o \

	msm_gpummu.o



msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \

	dp/dp_debug.o

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

+2 −2
Original line number Diff line number Diff line
@@ -113,7 +113,7 @@ static int a2xx_hw_init(struct msm_gpu *gpu) 
	uint32_t *ptr, len;

	int i, ret;



	msm_gpummu_params(gpu->aspace->mmu, &pt_base, &tran_error);

	a2xx_gpummu_params(gpu->aspace->mmu, &pt_base, &tran_error);



	DBG("%s", gpu->name);
@@ -469,7 +469,7 @@ static struct msm_gpu_state *a2xx_gpu_state_get(struct msm_gpu *gpu) 
static struct msm_gem_address_space *

a2xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev)

{

	struct msm_mmu *mmu = msm_gpummu_new(&pdev->dev, gpu);

	struct msm_mmu *mmu = a2xx_gpummu_new(&pdev->dev, gpu);

	struct msm_gem_address_space *aspace;



	aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M,

drivers/gpu/drm/msm/adreno/a2xx_gpu.h

+4 −0
Original line number Diff line number Diff line
@@ -19,4 +19,8 @@ struct a2xx_gpu { 
};

#define to_a2xx_gpu(x) container_of(x, struct a2xx_gpu, base)



struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu);

void a2xx_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,

		dma_addr_t *tran_error);



#endif /* __A2XX_GPU_H__ */

drivers/gpu/drm/msm/msm_gpummu.c→drivers/gpu/drm/msm/adreno/a2xx_gpummu.c

+24 −21
Original line number Diff line number Diff line
@@ -5,30 +5,33 @@ 


#include "msm_drv.h"

#include "msm_mmu.h"

#include "adreno/adreno_gpu.h"

#include "adreno/a2xx.xml.h"



struct msm_gpummu {

#include "adreno_gpu.h"

#include "a2xx_gpu.h"



#include "a2xx.xml.h"



struct a2xx_gpummu {

	struct msm_mmu base;

	struct msm_gpu *gpu;

	dma_addr_t pt_base;

	uint32_t *table;

};

#define to_msm_gpummu(x) container_of(x, struct msm_gpummu, base)

#define to_a2xx_gpummu(x) container_of(x, struct a2xx_gpummu, base)



#define GPUMMU_VA_START SZ_16M

#define GPUMMU_VA_RANGE (0xfff * SZ_64K)

#define GPUMMU_PAGE_SIZE SZ_4K

#define TABLE_SIZE (sizeof(uint32_t) * GPUMMU_VA_RANGE / GPUMMU_PAGE_SIZE)



static void msm_gpummu_detach(struct msm_mmu *mmu)

static void a2xx_gpummu_detach(struct msm_mmu *mmu)

{

}



static int msm_gpummu_map(struct msm_mmu *mmu, uint64_t iova,

static int a2xx_gpummu_map(struct msm_mmu *mmu, uint64_t iova,

		struct sg_table *sgt, size_t len, int prot)

{

	struct msm_gpummu *gpummu = to_msm_gpummu(mmu);

	struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);

	unsigned idx = (iova - GPUMMU_VA_START) / GPUMMU_PAGE_SIZE;

	struct sg_dma_page_iter dma_iter;

	unsigned prot_bits = 0;
@@ -53,9 +56,9 @@ static int msm_gpummu_map(struct msm_mmu *mmu, uint64_t iova, 
	return 0;

}



static int msm_gpummu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len)

static int a2xx_gpummu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len)

{

	struct msm_gpummu *gpummu = to_msm_gpummu(mmu);

	struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);

	unsigned idx = (iova - GPUMMU_VA_START) / GPUMMU_PAGE_SIZE;

	unsigned i;
@@ -68,13 +71,13 @@ static int msm_gpummu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len) 
	return 0;

}



static void msm_gpummu_resume_translation(struct msm_mmu *mmu)

static void a2xx_gpummu_resume_translation(struct msm_mmu *mmu)

{

}



static void msm_gpummu_destroy(struct msm_mmu *mmu)

static void a2xx_gpummu_destroy(struct msm_mmu *mmu)

{

	struct msm_gpummu *gpummu = to_msm_gpummu(mmu);

	struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);



	dma_free_attrs(mmu->dev, TABLE_SIZE, gpummu->table, gpummu->pt_base,

		DMA_ATTR_FORCE_CONTIGUOUS);
@@ -83,16 +86,16 @@ static void msm_gpummu_destroy(struct msm_mmu *mmu) 
}



static const struct msm_mmu_funcs funcs = {

		.detach = msm_gpummu_detach,

		.map = msm_gpummu_map,

		.unmap = msm_gpummu_unmap,

		.destroy = msm_gpummu_destroy,

		.resume_translation = msm_gpummu_resume_translation,

		.detach = a2xx_gpummu_detach,

		.map = a2xx_gpummu_map,

		.unmap = a2xx_gpummu_unmap,

		.destroy = a2xx_gpummu_destroy,

		.resume_translation = a2xx_gpummu_resume_translation,

};



struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu)

struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu)

{

	struct msm_gpummu *gpummu;

	struct a2xx_gpummu *gpummu;



	gpummu = kzalloc(sizeof(*gpummu), GFP_KERNEL);

	if (!gpummu)
@@ -111,10 +114,10 @@ struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu) 
	return &gpummu->base;

}



void msm_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,

void a2xx_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,

		dma_addr_t *tran_error)

{

	dma_addr_t base = to_msm_gpummu(mmu)->pt_base;

	dma_addr_t base = to_a2xx_gpummu(mmu)->pt_base;



	*pt_base = base;

	*tran_error = base + TABLE_SIZE; /* 32-byte aligned */

drivers/gpu/drm/msm/msm_mmu.h

+0 −5
Original line number Diff line number Diff line
@@ -42,7 +42,6 @@ static inline void msm_mmu_init(struct msm_mmu *mmu, struct device *dev, 


struct msm_mmu *msm_iommu_new(struct device *dev, unsigned long quirks);

struct msm_mmu *msm_iommu_gpu_new(struct device *dev, struct msm_gpu *gpu, unsigned long quirks);

struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu);



static inline void msm_mmu_set_fault_handler(struct msm_mmu *mmu, void *arg,

		int (*handler)(void *arg, unsigned long iova, int flags, void *data))
@@ -53,10 +52,6 @@ static inline void msm_mmu_set_fault_handler(struct msm_mmu *mmu, void *arg, 


struct msm_mmu *msm_iommu_pagetable_create(struct msm_mmu *parent);



void msm_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,

		dma_addr_t *tran_error);





int msm_iommu_pagetable_params(struct msm_mmu *mmu, phys_addr_t *ttbr,

		int *asid);

struct iommu_domain_geometry *msm_iommu_get_geometry(struct msm_mmu *mmu);