Unverified Commit d8966b65 authored by Vishwaroop A's avatar Vishwaroop A Committed by Mark Brown
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spi: tegra210-quad: modify chip select (CS) deactivation 



Modify the chip select (CS) deactivation and inter-transfer delay
execution only during the DATA_TRANSFER phase when the cs_change
flag is not set. This ensures proper CS handling and timing between
transfers while eliminating redundant operations.

Fixes: 1b8342cc ("spi: tegra210-quad: combined sequence mode")
Signed-off-by: default avatarVishwaroop A <va@nvidia.com>
Link: https://patch.msgid.link/20250416110606.2737315-4-va@nvidia.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 400d9f1a

drivers/spi/spi-tegra210-quad.c

+4 −4
Original line number Diff line number Diff line
@@ -1159,16 +1159,16 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi, 
				ret = -EIO;

				goto exit;

			}

			if (!xfer->cs_change) {

				tegra_qspi_transfer_end(spi);

				spi_transfer_delay_exec(xfer);

			}

			break;

		default:

			ret = -EINVAL;

			goto exit;

		}

		msg->actual_length += xfer->len;

		if (!xfer->cs_change && transfer_phase == DATA_TRANSFER) {

			tegra_qspi_transfer_end(spi);

			spi_transfer_delay_exec(xfer);

		}

		transfer_phase++;

	}

	ret = 0;