Commit d8abcb73 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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dt-bindings: clock: renesas,rzg2l-cpg: Update description for #reset-cells 



For the RZ/G2L and similar SoCs, the reset specifier is the reset number
and not the module number. Reflect this in the description for the
'#reset-cells' property.

Reported-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarRob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240606161047.663833-1-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 20927606

Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml

+1 −1
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ properties: 


  '#reset-cells':

    description:

      The single reset specifier cell must be the module number, as defined in

      The single reset specifier cell must be the reset number, as defined in

      <dt-bindings/clock/r9a0*-cpg.h>.

    const: 1