Commit d8e12a0d authored by Marc Zyngier's avatar Marc Zyngier Committed by Will Deacon
Browse files

arm64: Kill detection of VPIPT i-cache policy 



Since the kernel will never run on a system with the VPIPT i-cache
policy, drop the detection code altogether.

Reviewed-by: default avatarZenghui Yu <yuzenghui@huawei.com>
Reviewed-by: default avatarAnshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20231204143606.1806432-3-maz@kernel.org


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent ced242ba

arch/arm64/include/asm/cache.h

+0 −6
Original line number Diff line number Diff line
@@ -58,7 +58,6 @@ static inline unsigned int arch_slab_minalign(void) 
#define CTR_L1IP(ctr)		SYS_FIELD_GET(CTR_EL0, L1Ip, ctr)



#define ICACHEF_ALIASING	0

#define ICACHEF_VPIPT		1

extern unsigned long __icache_flags;



/*
@@ -70,11 +69,6 @@ static inline int icache_is_aliasing(void) 
	return test_bit(ICACHEF_ALIASING, &__icache_flags);

}



static __always_inline int icache_is_vpipt(void)

{

	return test_bit(ICACHEF_VPIPT, &__icache_flags);

}



static inline u32 cache_type_cwg(void)

{

	return SYS_FIELD_GET(CTR_EL0, CWG, read_cpuid_cachetype());

arch/arm64/kernel/cpuinfo.c

+0 −5
Original line number Diff line number Diff line
@@ -36,8 +36,6 @@ static struct cpuinfo_arm64 boot_cpu_data; 
static inline const char *icache_policy_str(int l1ip)

{

	switch (l1ip) {

	case CTR_EL0_L1Ip_VPIPT:

		return "VPIPT";

	case CTR_EL0_L1Ip_VIPT:

		return "VIPT";

	case CTR_EL0_L1Ip_PIPT:
@@ -388,9 +386,6 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info) 
	switch (l1ip) {

	case CTR_EL0_L1Ip_PIPT:

		break;

	case CTR_EL0_L1Ip_VPIPT:

		set_bit(ICACHEF_VPIPT, &__icache_flags);

		break;

	case CTR_EL0_L1Ip_VIPT:

	default:

		/* Assume aliasing */