Commit d93f8ea0 authored Mar 17, 2026 by Dave Airlie

Merge tag 'drm-intel-next-2026-03-16' of...

Merge tag 'drm-intel-next-2026-03-16' of https://gitlab.freedesktop.org/drm/i915/kernel

 into drm-next

[airlied: fixed conflict with xe tree]
drm/i915 feature pull for v7.1:

Features and functionality:
- C10/C20/LT PHY PLL divider verification (Mika)
- Use trans push mechanism to generate PSR frame change event on LNL+ (Jouni)
- Account for DSC bubble overhead for horizontal slices (Ankit, Chaitanya)

Refactoring and cleanups:
- Refactor DP DSC slice config computation (Imre)
- Use GVT versions of register helper macros for GVT MMIO table (Ankit)
- C10/C20/LT PHY PLL computation refactoring (Mika)
- VGA decode refactoring and related fixes/cleanups (Ville)
- Move DSB buffer buffer implementation to display parent interface (Jani)
- Move error interrupt capture to display irq snapshot (Jani)
- Move pcode calls to display parent interface (Jani)
- Reduce GVT dependency on display headers (Jani)
- Compute config and mode valid refactoring for DSC (Ankit)
- Stop using i915 core register headers in display (Uma)
- Refactor DPT, move i915 parts to display parent interface (Jani)
- Refactor gen2-4 overlay, move to display parent interface (Ville)
- Refactor masked field register macro helpers, move to shared headers (Jani)
- Convert a number of workaround checks to the new workaround framework (Luca)
- Refactor and move frontbuffer calls to display parent interface (Jani)
- Add VMA calls to display parent interface (Jani)
- Refactor stolen memory allocation decisions (Vinod, Ville)
- Clean up and unify workqueue usage (Marco Crivellari)
- Preparation for UHBR DP tunnels (Imre)
- Allow DSC passthrough modes during DP MST mode validation (Imre)
- Move framebuffer bo interface to display parent interface (Jani)

Fixes:
- Plenty of DP SST HPD IRQ handling fixes (Imre)
- DP AUX backlight and luminance control fixes (Suraj)
- Respect VBT pipe joiner disable for eDP (Ankit)
- Do not use CASF with joiner (Nemesa)
- Clear C10/C20 PHY response read and error bit to avoid PHY hangs (Suraj)
- Xe3p_LPD DMG clock gating, CDCLK, port sync workarounds (Suraj, Gustavo, Mitul)
- Fix GVT error path (Michał)
- Handle errors on DP DSC receiver cap reads (Suraj)
- DSS clock gating workaround on MTL+ to avoid DSC corruption (Mika)
- Skip state verification for LT PHY in TBT mode (Suraj)
- Fix NULL pointer dereference on suspend when uc firmware not loaded (Rahul Bukte)
- Fix an unlikely DMC state related NULL pointer dereference at probe (Imre)
- Handle error returns from vga_get_uninterruptible() (Simon Richter)
- Increase C10/C20/LT PHY timeouts to include SOC/OS turnaround (Arun)
- Fix BIOS FB vs. stolen memory size check (Ville)
- Fix LOBF to use computed guardband and set context latency (Ankit)
- Handle modeset WW mutex lock failures due to contention properly (Imre)
- Fix pipe BPP clamping due to HDR (Imre)
- Fix stale state usage in DSC state computation (Imre)
- Take HDCP 1.4 vs 2.x into account during link check (Suraj)
- Fix forced link retrain handling in MST HPD IRQ handler (Imre)
- Remove redundant warning on vcpi < 0 (Jonathan)

Core changes:
- iopoll: fix function parameter names in read_poll_timeout_atomic() (Randy Dunlap)

Merges:
- Backmerge drm-next for v7.0-rc1 (Jani)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patch.msgid.link/b14bb0f297b1750816cf5f342bde608e435655fa@intel.com

parents 02e778f1 9876394f

drivers/gpu/drm/i915/Makefile

+4 −3

Original line number	Diff line number	Diff line
		@@ -76,9 +76,13 @@ i915-$(CONFIG_PERF_EVENTS) += \

		# core display adaptation
		i915-y += \
		i915_bo.o \
		i915_display_pc8.o \
		i915_dpt.o \
		i915_dsb_buffer.o \
		i915_hdcp_gsc.o \
		i915_initial_plane.o \
		i915_overlay.o \
		i915_panic.o

		# "Graphics Technology" (aka we talk to the gpu)
		@@ -270,13 +274,10 @@ i915-y += \
		display/intel_dpll.o \
		display/intel_dpll_mgr.o \
		display/intel_dpt.o \
		display/intel_dpt_common.o \
		display/intel_dram.o \
		display/intel_drrs.o \
		display/intel_dsb.o \
		display/intel_dsb_buffer.o \
		display/intel_fb.o \
		display/intel_fb_bo.o \
		display/intel_fb_pin.o \
		display/intel_fbc.o \
		display/intel_fdi.o \

drivers/gpu/drm/i915/display/g4x_dp.c

+0 −1

Original line number	Diff line number	Diff line
		@@ -10,7 +10,6 @@
		#include <drm/drm_print.h>

		#include "g4x_dp.h"
		#include "i915_reg.h"
		#include "intel_audio.h"
		#include "intel_backlight.h"
		#include "intel_connector.h"

drivers/gpu/drm/i915/display/g4x_hdmi.c

+0 −1

Original line number	Diff line number	Diff line
		@@ -8,7 +8,6 @@
		#include <drm/drm_print.h>

		#include "g4x_hdmi.h"
		#include "i915_reg.h"
		#include "intel_atomic.h"
		#include "intel_audio.h"
		#include "intel_connector.h"

drivers/gpu/drm/i915/display/hsw_ips.c

+5 −5

Original line number	Diff line number	Diff line
		@@ -6,15 +6,15 @@
		#include <linux/debugfs.h>

		#include <drm/drm_print.h>
		#include <drm/intel/intel_pcode_regs.h>

		#include "hsw_ips.h"
		#include "i915_reg.h"
		#include "intel_color_regs.h"
		#include "intel_de.h"
		#include "intel_display_regs.h"
		#include "intel_display_rpm.h"
		#include "intel_display_types.h"
		#include "intel_pcode.h"
		#include "intel_parent.h"

		static void hsw_ips_enable(const struct intel_crtc_state *crtc_state)
		{
		@@ -39,7 +39,7 @@ static void hsw_ips_enable(const struct intel_crtc_state *crtc_state)

		if (display->platform.broadwell) {
		drm_WARN_ON(display->drm,
		intel_pcode_write(display->drm, DISPLAY_IPS_CONTROL,
		intel_parent_pcode_write(display, DISPLAY_IPS_CONTROL,
		val \| IPS_PCODE_CONTROL));
		/*
		* Quoting Art Runyan: "its not safe to expect any particular
		@@ -72,7 +72,7 @@ bool hsw_ips_disable(const struct intel_crtc_state *crtc_state)

		if (display->platform.broadwell) {
		drm_WARN_ON(display->drm,
		intel_pcode_write(display->drm, DISPLAY_IPS_CONTROL, 0));
		intel_parent_pcode_write(display, DISPLAY_IPS_CONTROL, 0));
		/*
		* Wait for PCODE to finish disabling IPS. The BSpec specified
		* 42ms timeout value leads to occasional timeouts so use 100ms

drivers/gpu/drm/i915/display/i9xx_plane.c

+0 −1

Original line number	Diff line number	Diff line
		@@ -10,7 +10,6 @@
		#include <drm/drm_fourcc.h>
		#include <drm/drm_print.h>

		#include "i915_reg.h"
		#include "i9xx_plane.h"
		#include "i9xx_plane_regs.h"
		#include "intel_atomic.h"