Commit d94470e9 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/fifo: add common runlist/engine topology



Creates an nvkm_runl for each runlist on the GPU, and an nvkm_engn for
each engine that is reachable from a runlist.

- basically what gk104- already does, but extended to all chips
- adds per-runlist CHID allocators (Ampere)
- splits g98/gt2xx out from g84 (different target engines)

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent 1c488ba9
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+15 −0
Original line number Diff line number Diff line
@@ -35,6 +35,21 @@ nvkm_blob_dtor(struct nvkm_blob *blob)
	blob->size = 0;
}

#define nvkm_list_find_next(p,h,m,c) ({                                                      \
	typeof(p) _p = NULL;                                                                 \
	list_for_each_entry_continue(p, (h), m) {                                            \
		if (c) {                                                                     \
			_p = p;                                                              \
			break;                                                               \
		}                                                                            \
	}                                                                                    \
	_p;                                                                                  \
})
#define nvkm_list_find(p,h,m,c)                                                              \
	(p = container_of((h), typeof(*p), m), nvkm_list_find_next(p, (h), m, (c)))
#define nvkm_list_foreach(p,h,m,c)                                                           \
	for (p = nvkm_list_find(p, (h), m, (c)); p; p = nvkm_list_find_next(p, (h), m, (c)))

/*FIXME: remove after */
#define nvkm_fifo_chan nvkm_chan
#define nvkm_fifo_chan_func nvkm_chan_func
+2 −0
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ struct nvkm_fifo {
	struct nvkm_chid *cgid;

	struct list_head runqs;
	struct list_head runls;

	DECLARE_BITMAP(mask, NVKM_FIFO_CHID_NR);
	int nr;
@@ -71,6 +72,7 @@ int nv17_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct
int nv40_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
int nv50_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
int g84_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
int g98_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
int gf100_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
int gk104_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
int gk110_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
+7 −7
Original line number Diff line number Diff line
@@ -1095,7 +1095,7 @@ nv98_chipset = {
	.volt     = { 0x00000001, nv40_volt_new },
	.disp     = { 0x00000001, g94_disp_new },
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.fifo     = { 0x00000001, g98_fifo_new },
	.gr       = { 0x00000001, g84_gr_new },
	.mspdec   = { 0x00000001, g98_mspdec_new },
	.msppp    = { 0x00000001, g98_msppp_new },
@@ -1161,7 +1161,7 @@ nva3_chipset = {
	.ce       = { 0x00000001, gt215_ce_new },
	.disp     = { 0x00000001, gt215_disp_new },
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.fifo     = { 0x00000001, g98_fifo_new },
	.gr       = { 0x00000001, gt215_gr_new },
	.mpeg     = { 0x00000001, g84_mpeg_new },
	.mspdec   = { 0x00000001, gt215_mspdec_new },
@@ -1195,7 +1195,7 @@ nva5_chipset = {
	.ce       = { 0x00000001, gt215_ce_new },
	.disp     = { 0x00000001, gt215_disp_new },
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.fifo     = { 0x00000001, g98_fifo_new },
	.gr       = { 0x00000001, gt215_gr_new },
	.mspdec   = { 0x00000001, gt215_mspdec_new },
	.msppp    = { 0x00000001, gt215_msppp_new },
@@ -1228,7 +1228,7 @@ nva8_chipset = {
	.ce       = { 0x00000001, gt215_ce_new },
	.disp     = { 0x00000001, gt215_disp_new },
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.fifo     = { 0x00000001, g98_fifo_new },
	.gr       = { 0x00000001, gt215_gr_new },
	.mspdec   = { 0x00000001, gt215_mspdec_new },
	.msppp    = { 0x00000001, gt215_msppp_new },
@@ -1259,7 +1259,7 @@ nvaa_chipset = {
	.volt     = { 0x00000001, nv40_volt_new },
	.disp     = { 0x00000001, mcp77_disp_new },
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.fifo     = { 0x00000001, g98_fifo_new },
	.gr       = { 0x00000001, gt200_gr_new },
	.mspdec   = { 0x00000001, g98_mspdec_new },
	.msppp    = { 0x00000001, g98_msppp_new },
@@ -1291,7 +1291,7 @@ nvac_chipset = {
	.volt     = { 0x00000001, nv40_volt_new },
	.disp     = { 0x00000001, mcp77_disp_new },
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.fifo     = { 0x00000001, g98_fifo_new },
	.gr       = { 0x00000001, mcp79_gr_new },
	.mspdec   = { 0x00000001, g98_mspdec_new },
	.msppp    = { 0x00000001, g98_msppp_new },
@@ -1325,7 +1325,7 @@ nvaf_chipset = {
	.ce       = { 0x00000001, gt215_ce_new },
	.disp     = { 0x00000001, mcp89_disp_new },
	.dma      = { 0x00000001, nv50_dma_new },
	.fifo     = { 0x00000001, g84_fifo_new },
	.fifo     = { 0x00000001, g98_fifo_new },
	.gr       = { 0x00000001, mcp89_gr_new },
	.mspdec   = { 0x00000001, gt215_mspdec_new },
	.msppp    = { 0x00000001, gt215_msppp_new },
+2 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@
nvkm-y += nvkm/engine/fifo/base.o
nvkm-y += nvkm/engine/fifo/chan.o
nvkm-y += nvkm/engine/fifo/chid.o
nvkm-y += nvkm/engine/fifo/runl.o
nvkm-y += nvkm/engine/fifo/runq.o

nvkm-y += nvkm/engine/fifo/nv04.o
@@ -10,6 +11,7 @@ nvkm-y += nvkm/engine/fifo/nv17.o
nvkm-y += nvkm/engine/fifo/nv40.o
nvkm-y += nvkm/engine/fifo/nv50.o
nvkm-y += nvkm/engine/fifo/g84.o
nvkm-y += nvkm/engine/fifo/g98.o
nvkm-y += nvkm/engine/fifo/gf100.o
nvkm-y += nvkm/engine/fifo/gk104.o
nvkm-y += nvkm/engine/fifo/gk110.o
+19 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@
#include "priv.h"
#include "chan.h"
#include "chid.h"
#include "runl.h"
#include "runq.h"

#include <core/gpuobj.h>
@@ -236,6 +237,8 @@ static int
nvkm_fifo_oneinit(struct nvkm_engine *engine)
{
	struct nvkm_fifo *fifo = nvkm_fifo(engine);
	struct nvkm_runl *runl;
	struct nvkm_engn *engn;
	int ret, nr, i;

	/* Initialise CHID/CGID allocator(s) on GPUs where they aren't per-runlist. */
@@ -253,6 +256,18 @@ nvkm_fifo_oneinit(struct nvkm_engine *engine)
		}
	}

	/* Create runlists. */
	ret = fifo->func->runl_ctor(fifo);
	if (ret)
		return ret;

	nvkm_runl_foreach(runl, fifo) {
		RUNL_DEBUG(runl, "");
		nvkm_runl_foreach_engn(engn, runl) {
			ENGN_DEBUG(engn, "");
		}
	}

	if (fifo->func->oneinit)
		return fifo->func->oneinit(fifo);

@@ -269,9 +284,12 @@ static void *
nvkm_fifo_dtor(struct nvkm_engine *engine)
{
	struct nvkm_fifo *fifo = nvkm_fifo(engine);
	struct nvkm_runl *runl, *runt;
	struct nvkm_runq *runq, *rtmp;
	void *data = fifo;

	list_for_each_entry_safe(runl, runt, &fifo->runls, head)
		nvkm_runl_del(runl);
	list_for_each_entry_safe(runq, rtmp, &fifo->runqs, head)
		nvkm_runq_del(runq);

@@ -306,6 +324,7 @@ nvkm_fifo_ctor(const struct nvkm_fifo_func *func, struct nvkm_device *device,

	fifo->func = func;
	INIT_LIST_HEAD(&fifo->runqs);
	INIT_LIST_HEAD(&fifo->runls);
	spin_lock_init(&fifo->lock);
	mutex_init(&fifo->mutex);

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