+96
−0
Loading
Document the TPS65185. GPIO names are same as in the datasheet except for the PWRUP pad which is described as "enable". That pin is optional because the rising edge corresponds to setting one register bit and falling edge to another register bit. Reviewed-by:Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by:
Andreas Kemnade <andreas@kemnade.info> Link: https://patch.msgid.link/20260102-tps65185-submit-v3-1-23bda35772f2@kemnade.info Signed-off-by:
Mark Brown <broonie@kernel.org>