Commit da795dc4 authored by Andrew Davis's avatar Andrew Davis Committed by Nishanth Menon
Browse files

arm64: dts: ti: k3-am65: Move SerDes mux nodes under the control node 



These SerDes lane select muxes use bits from the same register as
the SerDes clock select mux. Make the lane select mux a child
of the SerDes control node.

This removes one more requirement on scm-conf being a syscon node
which will later be converted to fix a couple DTS check warnings.

Signed-off-by: default avatarAndrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240326185627.29852-2-afd@ti.com


Signed-off-by: default avatarNishanth Menon <nm@ti.com>
parent 956dbce4

arch/arm64/boot/dts/ti/k3-am65-main.dtsi

+13 −8
Original line number Diff line number Diff line
@@ -66,7 +66,7 @@ serdes0: serdes@900000 { 
		assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;

		ti,serdes-clk = <&serdes0_clk>;

		#clock-cells = <1>;

		mux-controls = <&serdes_mux 0>;

		mux-controls = <&serdes0_mux 0>;

	};



	serdes1: serdes@910000 {
@@ -81,7 +81,7 @@ serdes1: serdes@910000 { 
		assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>;

		ti,serdes-clk = <&serdes1_clk>;

		#clock-cells = <1>;

		mux-controls = <&serdes_mux 1>;

		mux-controls = <&serdes1_mux 0>;

	};



	main_uart0: serial@2800000 {
@@ -484,18 +484,23 @@ scm_conf: scm-conf@100000 { 
		serdes0_clk: clock@4080 {

			compatible = "ti,am654-serdes-ctrl", "syscon";

			reg = <0x4080 0x4>;



			serdes0_mux: mux-controller {

				compatible = "mmio-mux";

				#mux-control-cells = <1>;

				mux-reg-masks = <0x0 0x3>; /* lane select */

			};

		};



		serdes1_clk: clock@4090 {

			compatible = "ti,am654-serdes-ctrl", "syscon";

			reg = <0x4090 0x4>;

		};



		serdes_mux: mux-controller {

			serdes1_mux: mux-controller {

				compatible = "mmio-mux";

				#mux-control-cells = <1>;

			mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */

					<0x4090 0x3>; /* SERDES1 lane select */

				mux-reg-masks = <0x0 0x3>; /* lane select */

			};

		};



		dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {