Commit daec424c authored by Jean-Baptiste Maneyrol's avatar Jean-Baptiste Maneyrol Committed by Jonathan Cameron
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iio: imu: inv_mpu6050: fix frequency setting when chip is off



Track correctly FIFO state and apply ODR change before starting
the chip. Without the fix, you cannot change ODR more than 1 time
when data buffering is off. This restriction on a single pending ODR
change should only apply when the FIFO is on.

Fixes: 111e1abd ("iio: imu: inv_mpu6050: use the common inv_sensors timestamp module")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarJean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
Link: https://lore.kernel.org/r/20240219154741.90601-1-inv.git-commit@tdk.com


Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent a9dd9ba3
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+5 −0
Original line number Diff line number Diff line
@@ -111,6 +111,7 @@ int inv_mpu6050_prepare_fifo(struct inv_mpu6050_state *st, bool enable)
	if (enable) {
		/* reset timestamping */
		inv_sensors_timestamp_reset(&st->timestamp);
		inv_sensors_timestamp_apply_odr(&st->timestamp, 0, 0, 0);
		/* reset FIFO */
		d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_RST;
		ret = regmap_write(st->map, st->reg->user_ctrl, d);
@@ -184,6 +185,10 @@ static int inv_mpu6050_set_enable(struct iio_dev *indio_dev, bool enable)
		if (result)
			goto error_power_off;
	} else {
		st->chip_config.gyro_fifo_enable = 0;
		st->chip_config.accl_fifo_enable = 0;
		st->chip_config.temp_fifo_enable = 0;
		st->chip_config.magn_fifo_enable = 0;
		result = inv_mpu6050_prepare_fifo(st, false);
		if (result)
			goto error_power_off;