Commit db404525 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge back new cpufreq material for v6.11.

parents 350cbb5d 7e1c3f58
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+47 −46
Original line number Diff line number Diff line
@@ -2368,54 +2368,54 @@ static const struct pstate_funcs knl_funcs = {
	.get_val = core_get_val,
};

#define X86_MATCH(model, policy)					 \
	X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
					   X86_FEATURE_APERFMPERF, &policy)
#define X86_MATCH(vfm, policy)					 \
	X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_APERFMPERF, &policy)

static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
	X86_MATCH(SANDYBRIDGE,		core_funcs),
	X86_MATCH(SANDYBRIDGE_X,	core_funcs),
	X86_MATCH(ATOM_SILVERMONT,	silvermont_funcs),
	X86_MATCH(IVYBRIDGE,		core_funcs),
	X86_MATCH(HASWELL,		core_funcs),
	X86_MATCH(BROADWELL,		core_funcs),
	X86_MATCH(IVYBRIDGE_X,		core_funcs),
	X86_MATCH(HASWELL_X,		core_funcs),
	X86_MATCH(HASWELL_L,		core_funcs),
	X86_MATCH(HASWELL_G,		core_funcs),
	X86_MATCH(BROADWELL_G,		core_funcs),
	X86_MATCH(ATOM_AIRMONT,		airmont_funcs),
	X86_MATCH(SKYLAKE_L,		core_funcs),
	X86_MATCH(BROADWELL_X,		core_funcs),
	X86_MATCH(SKYLAKE,		core_funcs),
	X86_MATCH(BROADWELL_D,		core_funcs),
	X86_MATCH(XEON_PHI_KNL,		knl_funcs),
	X86_MATCH(XEON_PHI_KNM,		knl_funcs),
	X86_MATCH(ATOM_GOLDMONT,	core_funcs),
	X86_MATCH(ATOM_GOLDMONT_PLUS,	core_funcs),
	X86_MATCH(SKYLAKE_X,		core_funcs),
	X86_MATCH(COMETLAKE,		core_funcs),
	X86_MATCH(ICELAKE_X,		core_funcs),
	X86_MATCH(TIGERLAKE,		core_funcs),
	X86_MATCH(SAPPHIRERAPIDS_X,	core_funcs),
	X86_MATCH(EMERALDRAPIDS_X,      core_funcs),
	X86_MATCH(INTEL_SANDYBRIDGE,		core_funcs),
	X86_MATCH(INTEL_SANDYBRIDGE_X,		core_funcs),
	X86_MATCH(INTEL_ATOM_SILVERMONT,	silvermont_funcs),
	X86_MATCH(INTEL_IVYBRIDGE,		core_funcs),
	X86_MATCH(INTEL_HASWELL,		core_funcs),
	X86_MATCH(INTEL_BROADWELL,		core_funcs),
	X86_MATCH(INTEL_IVYBRIDGE_X,		core_funcs),
	X86_MATCH(INTEL_HASWELL_X,		core_funcs),
	X86_MATCH(INTEL_HASWELL_L,		core_funcs),
	X86_MATCH(INTEL_HASWELL_G,		core_funcs),
	X86_MATCH(INTEL_BROADWELL_G,		core_funcs),
	X86_MATCH(INTEL_ATOM_AIRMONT,		airmont_funcs),
	X86_MATCH(INTEL_SKYLAKE_L,		core_funcs),
	X86_MATCH(INTEL_BROADWELL_X,		core_funcs),
	X86_MATCH(INTEL_SKYLAKE,		core_funcs),
	X86_MATCH(INTEL_BROADWELL_D,		core_funcs),
	X86_MATCH(INTEL_XEON_PHI_KNL,		knl_funcs),
	X86_MATCH(INTEL_XEON_PHI_KNM,		knl_funcs),
	X86_MATCH(INTEL_ATOM_GOLDMONT,		core_funcs),
	X86_MATCH(INTEL_ATOM_GOLDMONT_PLUS,	core_funcs),
	X86_MATCH(INTEL_SKYLAKE_X,		core_funcs),
	X86_MATCH(INTEL_COMETLAKE,		core_funcs),
	X86_MATCH(INTEL_ICELAKE_X,		core_funcs),
	X86_MATCH(INTEL_TIGERLAKE,		core_funcs),
	X86_MATCH(INTEL_SAPPHIRERAPIDS_X,	core_funcs),
	X86_MATCH(INTEL_EMERALDRAPIDS_X,	core_funcs),
	{}
};
MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);

#ifdef CONFIG_ACPI
static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {
	X86_MATCH(BROADWELL_D,		core_funcs),
	X86_MATCH(BROADWELL_X,		core_funcs),
	X86_MATCH(SKYLAKE_X,		core_funcs),
	X86_MATCH(ICELAKE_X,		core_funcs),
	X86_MATCH(SAPPHIRERAPIDS_X,	core_funcs),
	X86_MATCH(INTEL_BROADWELL_D,		core_funcs),
	X86_MATCH(INTEL_BROADWELL_X,		core_funcs),
	X86_MATCH(INTEL_SKYLAKE_X,		core_funcs),
	X86_MATCH(INTEL_ICELAKE_X,		core_funcs),
	X86_MATCH(INTEL_SAPPHIRERAPIDS_X,	core_funcs),
	X86_MATCH(INTEL_EMERALDRAPIDS_X,	core_funcs),
	{}
};
#endif

static const struct x86_cpu_id intel_pstate_cpu_ee_disable_ids[] = {
	X86_MATCH(KABYLAKE,		core_funcs),
	X86_MATCH(INTEL_KABYLAKE,		core_funcs),
	{}
};

@@ -3351,14 +3351,13 @@ static inline void intel_pstate_request_control_from_smm(void) {}

#define INTEL_PSTATE_HWP_BROADWELL	0x01

#define X86_MATCH_HWP(model, hwp_mode)					\
	X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
					   X86_FEATURE_HWP, hwp_mode)
#define X86_MATCH_HWP(vfm, hwp_mode)				\
	X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_HWP, hwp_mode)

static const struct x86_cpu_id hwp_support_ids[] __initconst = {
	X86_MATCH_HWP(BROADWELL_X,	INTEL_PSTATE_HWP_BROADWELL),
	X86_MATCH_HWP(BROADWELL_D,	INTEL_PSTATE_HWP_BROADWELL),
	X86_MATCH_HWP(ANY,		0),
	X86_MATCH_HWP(INTEL_BROADWELL_X,	INTEL_PSTATE_HWP_BROADWELL),
	X86_MATCH_HWP(INTEL_BROADWELL_D,	INTEL_PSTATE_HWP_BROADWELL),
	X86_MATCH_HWP(INTEL_ANY,		0),
	{}
};

@@ -3391,15 +3390,17 @@ static const struct x86_cpu_id intel_epp_default[] = {
	 * which can result in one core turbo frequency for
	 * AlderLake Mobile CPUs.
	 */
	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)),
	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)),
	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
							HWP_EPP_BALANCE_POWERSAVE, 115, 16)),
	X86_MATCH_VFM(INTEL_ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)),
	X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)),
	X86_MATCH_VFM(INTEL_METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
		      179, 64, 16)),
	X86_MATCH_VFM(INTEL_ARROWLAKE, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
		      179, 64, 16)),
	{}
};

static const struct x86_cpu_id intel_hybrid_scaling_factor[] = {
	X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL),
	X86_MATCH_VFM(INTEL_METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL),
	{}
};

+4 −4
Original line number Diff line number Diff line
@@ -520,10 +520,10 @@ static struct cpufreq_driver centrino_driver = {
 * or ASCII model IDs.
 */
static const struct x86_cpu_id centrino_ids[] = {
	X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL,  6,  9, X86_FEATURE_EST, NULL),
	X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL,  6, 13, X86_FEATURE_EST, NULL),
	X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 15,  3, X86_FEATURE_EST, NULL),
	X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 15,  4, X86_FEATURE_EST, NULL),
	X86_MATCH_VFM_FEATURE(IFM( 6,  9), X86_FEATURE_EST, NULL),
	X86_MATCH_VFM_FEATURE(IFM( 6, 13), X86_FEATURE_EST, NULL),
	X86_MATCH_VFM_FEATURE(IFM(15,  3), X86_FEATURE_EST, NULL),
	X86_MATCH_VFM_FEATURE(IFM(15,  4), X86_FEATURE_EST, NULL),
	{}
};