Commit dbc988c6 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/hdp5.2: use memcfg register to post the write for HDP flush 



Reading back the remapped HDP flush register seems to cause
problems on some platforms. All we need is a read, so read back
the memcfg register.

Fixes: f756dbac ("drm/amdgpu/hdp5.2: do a posting read when flushing HDP")
Reported-by: default avatarAlexey Klimov <alexey.klimov@linaro.org>
Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908


Reviewed-by: default avatarFelix Kuehling <felix.kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 4a89b769)
Cc: stable@vger.kernel.org
parent 0e33e0f3

drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c

+11 −1
Original line number Diff line number Diff line
@@ -33,7 +33,17 @@ static void hdp_v5_2_flush_hdp(struct amdgpu_device *adev, 
	if (!ring || !ring->funcs->emit_wreg) {

		WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2,

			0);

		if (amdgpu_sriov_vf(adev)) {

			/* this is fine because SR_IOV doesn't remap the register */

			RREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2);

		} else {

			/* We just need to read back a register to post the write.

			 * Reading back the remapped register causes problems on

			 * some platforms so just read back the memory size register.

			 */

			if (adev->nbio.funcs->get_memsize)

				adev->nbio.funcs->get_memsize(adev);

		}

	} else {

		amdgpu_ring_emit_wreg(ring,

			(adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2,