Commit dbcab554 authored by Imre Deak's avatar Imre Deak Committed by Jani Nikula
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drm/i915/mtl: Fix HDMI/DP PLL clock selection 



Select the HDMI specific PLL clock only for HDMI outputs.

Fixes: 62618c7f ("drm/i915/mtl: C20 PLL programming")
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: default avatarRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231213220526.1828827-1-imre.deak@intel.com


(cherry picked from commit 937d02cc)
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 88a173e5

drivers/gpu/drm/i915/display/intel_cx0_phy.c

+2 −1
Original line number Diff line number Diff line
@@ -2465,7 +2465,8 @@ static void intel_program_port_clock_ctl(struct intel_encoder *encoder, 


	val |= XELPDP_FORWARD_CLOCK_UNGATE;



	if (is_hdmi_frl(crtc_state->port_clock))

	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) &&

	    is_hdmi_frl(crtc_state->port_clock))

		val |= XELPDP_DDI_CLOCK_SELECT(XELPDP_DDI_CLOCK_SELECT_DIV18CLK);

	else

		val |= XELPDP_DDI_CLOCK_SELECT(XELPDP_DDI_CLOCK_SELECT_MAXPCLK);