Commit dc0b5a61 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: split pipe handling from _dpu_crtc_blend_setup_mixer 



Rework _dpu_crtc_blend_setup_mixer() to split away pipe handling to a
separate functon. This is a preparation for the r_pipe support.

Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/527354/
Link: https://lore.kernel.org/r/20230316161653.4106395-27-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 6270e524

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

+50 −29
Original line number Diff line number Diff line
@@ -401,6 +401,46 @@ static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc) 
	}

}



static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc,

				       struct drm_plane *plane,

				       struct dpu_crtc_mixer *mixer,

				       u32 num_mixers,

				       enum dpu_stage stage,

				       struct dpu_format *format,

				       uint64_t modifier,

				       struct dpu_sw_pipe *pipe,

				       unsigned int stage_idx,

				       struct dpu_hw_stage_cfg *stage_cfg

				      )

{

	uint32_t lm_idx;

	enum dpu_sspp sspp_idx;

	struct drm_plane_state *state;



	sspp_idx = pipe->sspp->idx;



	state = plane->state;



	trace_dpu_crtc_setup_mixer(DRMID(crtc), DRMID(plane),

				   state, to_dpu_plane_state(state), stage_idx,

				   format->base.pixel_format,

				   modifier);



	DRM_DEBUG_ATOMIC("crtc %d stage:%d - plane %d sspp %d fb %d\n",

			 crtc->base.id,

			 stage,

			 plane->base.id,

			 sspp_idx - SSPP_NONE,

			 state->fb ? state->fb->base.id : -1);



	stage_cfg->stage[stage][stage_idx] = sspp_idx;

	stage_cfg->multirect_index[stage][stage_idx] = pipe->multirect_index;



	/* blend config update */

	for (lm_idx = 0; lm_idx < num_mixers; lm_idx++)

		mixer[lm_idx].lm_ctl->ops.update_pending_flush_sspp(mixer[lm_idx].lm_ctl, sspp_idx);

}



static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,

	struct dpu_crtc *dpu_crtc, struct dpu_crtc_mixer *mixer,

	struct dpu_hw_stage_cfg *stage_cfg)
@@ -413,15 +453,12 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, 
	struct dpu_format *format;

	struct dpu_hw_ctl *ctl = mixer->lm_ctl;



	uint32_t stage_idx, lm_idx;

	int zpos_cnt[DPU_STAGE_MAX + 1] = { 0 };

	uint32_t lm_idx;

	bool bg_alpha_enable = false;

	DECLARE_BITMAP(fetch_active, SSPP_MAX);



	memset(fetch_active, 0, sizeof(fetch_active));

	drm_atomic_crtc_for_each_plane(plane, crtc) {

		enum dpu_sspp sspp_idx;



		state = plane->state;

		if (!state)

			continue;
@@ -432,39 +469,21 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, 
		pstate = to_dpu_plane_state(state);

		fb = state->fb;



		sspp_idx = pstate->pipe.sspp->idx;

		set_bit(sspp_idx, fetch_active);



		DRM_DEBUG_ATOMIC("crtc %d stage:%d - plane %d sspp %d fb %d\n",

				crtc->base.id,

				pstate->stage,

				plane->base.id,

				sspp_idx - SSPP_VIG0,

				state->fb ? state->fb->base.id : -1);



		format = to_dpu_format(msm_framebuffer_format(pstate->base.fb));



		if (pstate->stage == DPU_STAGE_BASE && format->alpha_enable)

			bg_alpha_enable = true;



		stage_idx = zpos_cnt[pstate->stage]++;

		stage_cfg->stage[pstate->stage][stage_idx] =

					sspp_idx;

		stage_cfg->multirect_index[pstate->stage][stage_idx] =

					pstate->pipe.multirect_index;



		trace_dpu_crtc_setup_mixer(DRMID(crtc), DRMID(plane),

					   state, pstate, stage_idx,

					   format->base.pixel_format,

					   fb ? fb->modifier : 0);

		set_bit(pstate->pipe.sspp->idx, fetch_active);

		_dpu_crtc_blend_setup_pipe(crtc, plane,

					   mixer, cstate->num_mixers,

					   pstate->stage,

					   format, fb ? fb->modifier : 0,

					   &pstate->pipe, 0, stage_cfg);



		/* blend config update */

		for (lm_idx = 0; lm_idx < cstate->num_mixers; lm_idx++) {

			_dpu_crtc_setup_blend_cfg(mixer + lm_idx,

						pstate, format);



			mixer[lm_idx].lm_ctl->ops.update_pending_flush_sspp(mixer[lm_idx].lm_ctl,

									    sspp_idx);

			_dpu_crtc_setup_blend_cfg(mixer + lm_idx, pstate, format);



			if (bg_alpha_enable && !format->alpha_enable)

				mixer[lm_idx].mixer_op_mode = 0;
@@ -1322,6 +1341,8 @@ static int _dpu_debugfs_status_show(struct seq_file *s, void *data) 
		seq_printf(s, "\tdst x:%4d dst_y:%4d dst_w:%4d dst_h:%4d\n",

			state->crtc_x, state->crtc_y, state->crtc_w,

			state->crtc_h);

		seq_printf(s, "\tsspp:%s\n",

			   pstate->pipe.sspp->cap->name);

		seq_printf(s, "\tmultirect: mode: %d index: %d\n",

			pstate->pipe.multirect_mode, pstate->pipe.multirect_index);