Unverified Commit dc6ccb21 authored by Clément Léger's avatar Clément Léger Committed by Palmer Dabbelt
Browse files

riscv: hwprobe: export Zfa ISA extension 

Export Zfa ISA extension[1] through hwprobe.

Link: https://drive.google.com/file/d/1VT6QIggpb59-8QRV266dEE4T8FZTxGq4/view

 [1]
Signed-off-by: default avatarClément Léger <cleger@rivosinc.com>
Reviewed-by: default avatarEvan Green <evan@rivosinc.com>
Link: https://lore.kernel.org/r/20231114141256.126749-20-cleger@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent fe987e84

Documentation/arch/riscv/hwprobe.rst

+4 −0
Original line number Diff line number Diff line
@@ -157,6 +157,10 @@ The following keys are defined: 
       defined in the RISC-V Vector manual starting from commit e2ccd0548d6c

       ("Remove draft warnings from Zvfh[min]").



  * :c:macro:`RISCV_HWPROBE_EXT_ZFA`: The Zfa extension is supported as

       defined in the RISC-V ISA manual starting from commit 056b6ff467c7

       ("Zfa is ratified").



* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance

  information about the selected set of processors.

arch/riscv/include/uapi/asm/hwprobe.h

+1 −0
Original line number Diff line number Diff line
@@ -55,6 +55,7 @@ struct riscv_hwprobe { 
#define		RISCV_HWPROBE_EXT_ZIHINTNTL	(1 << 29)

#define		RISCV_HWPROBE_EXT_ZVFH		(1 << 30)

#define		RISCV_HWPROBE_EXT_ZVFHMIN	(1 << 31)

#define		RISCV_HWPROBE_EXT_ZFA		(1ULL << 32)

#define RISCV_HWPROBE_KEY_CPUPERF_0	5

#define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)

#define		RISCV_HWPROBE_MISALIGNED_EMULATED	(1 << 0)

arch/riscv/kernel/sys_riscv.c

+1 −0
Original line number Diff line number Diff line
@@ -193,6 +193,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, 
		if (has_fpu()) {

			EXT_KEY(ZFH);

			EXT_KEY(ZFHMIN);

			EXT_KEY(ZFA);

		}

#undef EXT_KEY

	}