Commit dd7db8d9 authored by Akash Goel's avatar Akash Goel Committed by Liviu Dudau
Browse files

drm/panthor: Explicitly set the coherency mode 



This commit fixes the potential misalignment between the value of device
tree property "dma-coherent" and default value of COHERENCY_ENABLE
register.
Panthor driver didn't explicitly program the COHERENCY_ENABLE register
with the desired coherency mode. The default value of COHERENCY_ENABLE
register is implementation defined, so it may not be always aligned with
the "dma-coherent" property value.
The commit also checks the COHERENCY_FEATURES register to confirm that
the coherency protocol is actually supported or not.

v2:
- Added R-b tags

Signed-off-by: default avatarAkash Goel <akash.goel@arm.com>
Reviewed-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: default avatarLiviu Dudau <liviu.dudau@arm.com>
Reviewed-by: default avatarSteven Price <steven.price@arm.com>
Link: https://lore.kernel.org/r/20241030225407.4077513-3-akash.goel@arm.com


Signed-off-by: default avatarLiviu Dudau <liviu.dudau@arm.com>
parent 06e931e0

drivers/gpu/drm/panthor/panthor_device.c

+21 −1
Original line number Diff line number Diff line
@@ -22,6 +22,24 @@ 
#include "panthor_regs.h"

#include "panthor_sched.h"



static int panthor_gpu_coherency_init(struct panthor_device *ptdev)

{

	ptdev->coherent = device_get_dma_attr(ptdev->base.dev) == DEV_DMA_COHERENT;



	if (!ptdev->coherent)

		return 0;



	/* Check if the ACE-Lite coherency protocol is actually supported by the GPU.

	 * ACE protocol has never been supported for command stream frontend GPUs.

	 */

	if ((gpu_read(ptdev, GPU_COHERENCY_FEATURES) &

		      GPU_COHERENCY_PROT_BIT(ACE_LITE)))

		return 0;



	drm_err(&ptdev->base, "Coherency not supported by the device");

	return -ENOTSUPP;

}



static int panthor_clk_init(struct panthor_device *ptdev)

{

	ptdev->clks.core = devm_clk_get(ptdev->base.dev, NULL);
@@ -156,7 +174,9 @@ int panthor_device_init(struct panthor_device *ptdev) 
	struct page *p;

	int ret;



	ptdev->coherent = device_get_dma_attr(ptdev->base.dev) == DEV_DMA_COHERENT;

	ret = panthor_gpu_coherency_init(ptdev);

	if (ret)

		return ret;



	init_completion(&ptdev->unplug.done);

	ret = drmm_mutex_init(&ptdev->base, &ptdev->unplug.lock);

drivers/gpu/drm/panthor/panthor_gpu.c

+9 −0
Original line number Diff line number Diff line
@@ -77,6 +77,12 @@ static const struct panthor_model gpu_models[] = { 
	 GPU_IRQ_RESET_COMPLETED | \

	 GPU_IRQ_CLEAN_CACHES_COMPLETED)



static void panthor_gpu_coherency_set(struct panthor_device *ptdev)

{

	gpu_write(ptdev, GPU_COHERENCY_PROTOCOL,

		ptdev->coherent ? GPU_COHERENCY_PROT_BIT(ACE_LITE) : GPU_COHERENCY_NONE);

}



static void panthor_gpu_init_info(struct panthor_device *ptdev)

{

	const struct panthor_model *model;
@@ -365,6 +371,9 @@ int panthor_gpu_l2_power_on(struct panthor_device *ptdev) 
			      hweight64(ptdev->gpu_info.shader_present));

	}



	/* Set the desired coherency mode before the power up of L2 */

	panthor_gpu_coherency_set(ptdev);



	return panthor_gpu_power_on(ptdev, L2, 1, 20000);

}