Commit ddb095e8 authored by Christian Marangi's avatar Christian Marangi Committed by Greg Kroah-Hartman
Browse files

dt-bindings: nvmem: Document support for Airoha AN8855 Switch EFUSE 



Document support for Airoha AN8855 Switch EFUSE used to calibrate
internal PHYs and store additional configuration info.

Signed-off-by: default avatarChristian Marangi <ansuelsmth@gmail.com>
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Signed-off-by: default avatarSrinivas Kandagatla <srini@kernel.org>
Link: https://lore.kernel.org/r/20250912131415.303407-5-srini@kernel.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4a9b344e

Documentation/devicetree/bindings/nvmem/airoha,an8855-efuse.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/nvmem/airoha,an8855-efuse.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Airoha AN8855 Switch EFUSE



maintainers:

  - Christian Marangi <ansuelsmth@gmail.com>



description:

  Airoha AN8855 EFUSE used to calibrate internal PHYs and store additional

  configuration info.



$ref: nvmem.yaml#



properties:

  compatible:

    const: airoha,an8855-efuse



  '#nvmem-cell-cells':

    const: 0



required:

  - compatible

  - '#nvmem-cell-cells'



unevaluatedProperties: false



examples:

  - |

    efuse {

        compatible = "airoha,an8855-efuse";



        #nvmem-cell-cells = <0>;



        nvmem-layout {

            compatible = "fixed-layout";

            #address-cells = <1>;

            #size-cells = <1>;



            shift_sel_port0_tx_a: shift-sel-port0-tx-a@c {

               reg = <0xc 0x4>;

            };



            shift_sel_port0_tx_b: shift-sel-port0-tx-b@10 {

                reg = <0x10 0x4>;

            };



            shift_sel_port0_tx_c: shift-sel-port0-tx-c@14 {

                reg = <0x14 0x4>;

            };



            shift_sel_port0_tx_d: shift-sel-port0-tx-d@18 {

               reg = <0x18 0x4>;

            };



            shift_sel_port1_tx_a: shift-sel-port1-tx-a@1c {

               reg = <0x1c 0x4>;

            };



            shift_sel_port1_tx_b: shift-sel-port1-tx-b@20 {

               reg = <0x20 0x4>;

            };



            shift_sel_port1_tx_c: shift-sel-port1-tx-c@24 {

               reg = <0x24 0x4>;

            };



            shift_sel_port1_tx_d: shift-sel-port1-tx-d@28 {

               reg = <0x28 0x4>;

            };



            shift_sel_port2_tx_a: shift-sel-port2-tx-a@2c {

                reg = <0x2c 0x4>;

            };



            shift_sel_port2_tx_b: shift-sel-port2-tx-b@30 {

                reg = <0x30 0x4>;

            };



            shift_sel_port2_tx_c: shift-sel-port2-tx-c@34 {

                reg = <0x34 0x4>;

            };



            shift_sel_port2_tx_d: shift-sel-port2-tx-d@38 {

                reg = <0x38 0x4>;

            };



            shift_sel_port3_tx_a: shift-sel-port3-tx-a@4c {

                reg = <0x4c 0x4>;

            };



            shift_sel_port3_tx_b: shift-sel-port3-tx-b@50 {

                reg = <0x50 0x4>;

            };



            shift_sel_port3_tx_c: shift-sel-port3-tx-c@54 {

               reg = <0x54 0x4>;

            };



            shift_sel_port3_tx_d: shift-sel-port3-tx-d@58 {

               reg = <0x58 0x4>;

            };



            shift_sel_port4_tx_a: shift-sel-port4-tx-a@5c {

                reg = <0x5c 0x4>;

            };



            shift_sel_port4_tx_b: shift-sel-port4-tx-b@60 {

                reg = <0x60 0x4>;

            };



            shift_sel_port4_tx_c: shift-sel-port4-tx-c@64 {

                reg = <0x64 0x4>;

            };



            shift_sel_port4_tx_d: shift-sel-port4-tx-d@68 {

                reg = <0x68 0x4>;

            };

        };

    };