Commit ddd0172f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'tty-6.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty 

Pull tty/serial driver updates from Greg KH:
 "Here is the big set of serial and tty driver updates for 6.15-rc1.
  Include in here are the following:

   - more great tty layer cleanups from Jiri. Someday this will be done,
     but that's not going to be any year soon...

   - kdb debug driver reverts to fix a reported issue

   - lots of .dts binding updates for different devices with serial
     devices

   - lots of tiny updates and tweaks and a few bugfixes for different
     serial drivers.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'tty-6.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (79 commits)
  tty: serial: fsl_lpuart: Fix unused variable 'sport' build warning
  serial: stm32: do not deassert RS485 RTS GPIO prematurely
  serial: 8250: add driver for NI UARTs
  dt-bindings: serial: snps-dw-apb-uart: document RZ/N1 binding without DMA
  serial: icom: fix code format problems
  serial: sh-sci: Save and restore more registers
  tty: serial: pl011: remove incorrect of_match_ptr annotation
  dt-bindings: serial: snps-dw-apb-uart: Add support for rk3562
  tty: serial: lpuart: only disable CTS instead of overwriting the whole UARTMODIR register
  tty: caif: removed unused function debugfs_tx()
  serial: 8250_dma: terminate correct DMA in tx_dma_flush()
  tty: serial: fsl_lpuart: rename register variables more specifically
  tty: serial: fsl_lpuart: use port struct directly to simply code
  tty: serial: fsl_lpuart: Use u32 and u8 for register variables
  tty: serial: fsl_lpuart: disable transmitter before changing RS485 related registers
  tty: serial: 8250: Add Brainboxes XC devices
  dt-bindings: serial: fsl-lpuart: support i.MX94
  tty: serial: 8250: Add some more device IDs
  dt-bindings: serial: samsung: add exynos7870-uart compatible
  serial: 8250_dw: Comment possible corner cases in serial_out() implementation
  ...
parents 25757984 9f8fe348

Documentation/devicetree/bindings/serial/8250.yaml

+1 −1
Original line number Diff line number Diff line
@@ -77,7 +77,6 @@ properties: 
              - altr,16550-FIFO64

              - altr,16550-FIFO128

              - fsl,16550-FIFO64

              - fsl,ns16550

              - andestech,uart16550

              - nxp,lpc1850-uart

              - opencores,uart16550-rtlsvn105
@@ -86,6 +85,7 @@ properties: 
      - items:

          - enum:

              - ns16750

              - fsl,ns16550

              - cavium,octeon-3860-uart

              - xlnx,xps-uart16550-2.00.b

              - ralink,rt2880-uart

Documentation/devicetree/bindings/serial/fsl-lpuart.yaml

+1 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ properties: 
      - items:

          - enum:

              - fsl,imx93-lpuart

              - fsl,imx94-lpuart

              - fsl,imx95-lpuart

          - const: fsl,imx8ulp-lpuart

          - const: fsl,imx7ulp-lpuart

Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml

0 → 100644
+73 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/serial/nvidia,tegra264-utc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NVIDIA Tegra UTC (UART Trace Controller) client



maintainers:

  - Kartik Rajput <kkartik@nvidia.com>

  - Thierry Reding <thierry.reding@gmail.com>

  - Jonathan Hunter <jonathanh@nvidia.com>



description:

  Represents a client interface of the Tegra UTC (UART Trace Controller). The

  Tegra UTC allows multiple clients within the Tegra SoC to share a physical

  UART interface. It supports up to 16 clients. Each client operates as an

  independent UART endpoint with a dedicated interrupt and 128-character TX/RX

  FIFOs.



  The Tegra UTC clients use 8-N-1 configuration and operates on a baudrate

  configured by the bootloader at the controller level.



allOf:

  - $ref: serial.yaml#



properties:

  compatible:

    const: nvidia,tegra264-utc



  reg:

    items:

      - description: TX region.

      - description: RX region.



  reg-names:

    items:

      - const: tx

      - const: rx



  interrupts:

    maxItems: 1



  tx-threshold:

    minimum: 1

    maximum: 128



  rx-threshold:

    minimum: 1

    maximum: 128



required:

  - compatible

  - reg

  - reg-names

  - interrupts

  - tx-threshold

  - rx-threshold



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    tegra_utc: serial@c4e0000 {

        compatible = "nvidia,tegra264-utc";

        reg = <0xc4e0000 0x8000>, <0xc4e8000 0x8000>;

        reg-names = "tx", "rx";

        interrupts = <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;

        tx-threshold = <4>;

        rx-threshold = <4>;

    };

Documentation/devicetree/bindings/serial/pl011.yaml

+3 −0
Original line number Diff line number Diff line
@@ -92,6 +92,9 @@ properties: 
      3000ms.

    default: 3000



  power-domains:

    maxItems: 1



  resets:

    maxItems: 1

Documentation/devicetree/bindings/serial/samsung_uart.yaml

+4 −0
Original line number Diff line number Diff line
@@ -42,6 +42,10 @@ properties: 
              - samsung,exynosautov9-uart

              - samsung,exynosautov920-uart

          - const: samsung,exynos850-uart

      - items:

          - enum:

              - samsung,exynos7870-uart

          - const: samsung,exynos8895-uart



  reg:

    maxItems: 1