Loading arch/sparc64/kernel/entry.S +12 −0 Original line number Diff line number Diff line Loading @@ -2593,3 +2593,15 @@ sun4v_mmustat_info: retl nop .size sun4v_mmustat_info, .-sun4v_mmustat_info .globl sun4v_mmu_demap_all .type sun4v_mmu_demap_all,#function sun4v_mmu_demap_all: clr %o0 clr %o1 mov HV_MMU_ALL, %o2 mov HV_FAST_MMU_DEMAP_ALL, %o5 ta HV_FAST_TRAP retl nop .size sun4v_mmu_demap_all, .-sun4v_mmu_demap_all arch/sparc64/mm/init.c +20 −9 Original line number Diff line number Diff line Loading @@ -1133,14 +1133,9 @@ static void __init mark_kpte_bitmap(unsigned long start, unsigned long end) } } static void __init kernel_physical_mapping_init(void) static void __init init_kpte_bitmap(void) { unsigned long i; #ifdef CONFIG_DEBUG_PAGEALLOC unsigned long mem_alloced = 0UL; #endif read_obp_memory("reg", &pall[0], &pall_ents); for (i = 0; i < pall_ents; i++) { unsigned long phys_start, phys_end; Loading @@ -1149,14 +1144,24 @@ static void __init kernel_physical_mapping_init(void) phys_end = phys_start + pall[i].reg_size; mark_kpte_bitmap(phys_start, phys_end); } } static void __init kernel_physical_mapping_init(void) { #ifdef CONFIG_DEBUG_PAGEALLOC unsigned long i, mem_alloced = 0UL; for (i = 0; i < pall_ents; i++) { unsigned long phys_start, phys_end; phys_start = pall[i].phys_addr; phys_end = phys_start + pall[i].reg_size; mem_alloced += kernel_map_range(phys_start, phys_end, PAGE_KERNEL); #endif } #ifdef CONFIG_DEBUG_PAGEALLOC printk("Allocated %ld bytes for kernel page tables.\n", mem_alloced); Loading Loading @@ -1398,6 +1403,10 @@ void __init paging_init(void) inherit_prom_mappings(); read_obp_memory("reg", &pall[0], &pall_ents); init_kpte_bitmap(); /* Ok, we can use our TLB miss and window trap handlers safely. */ setup_tba(); Loading Loading @@ -1904,7 +1913,9 @@ void __flush_tlb_all(void) "wrpr %0, %1, %%pstate" : "=r" (pstate) : "i" (PSTATE_IE)); if (tlb_type == spitfire) { if (tlb_type == hypervisor) { sun4v_mmu_demap_all(); } else if (tlb_type == spitfire) { for (i = 0; i < 64; i++) { /* Spitfire Errata #32 workaround */ /* NOTE: Always runs on spitfire, so no Loading include/asm-sparc/unistd.h +9 −0 Original line number Diff line number Diff line Loading @@ -333,6 +333,15 @@ #define NR_SYSCALLS 315 /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, * it never had the plain ones and there is no value to adding those * old versions into the syscall table. */ #define __IGNORE_setresuid #define __IGNORE_getresuid #define __IGNORE_setresgid #define __IGNORE_getresgid #ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR Loading include/asm-sparc64/hypervisor.h +4 −0 Original line number Diff line number Diff line Loading @@ -709,6 +709,10 @@ extern unsigned long sun4v_mmu_tsb_ctx0(unsigned long num_descriptions, */ #define HV_FAST_MMU_DEMAP_ALL 0x24 #ifndef __ASSEMBLY__ extern void sun4v_mmu_demap_all(void); #endif /* mmu_map_perm_addr() * TRAP: HV_FAST_TRAP * FUNCTION: HV_FAST_MMU_MAP_PERM_ADDR Loading Loading
arch/sparc64/kernel/entry.S +12 −0 Original line number Diff line number Diff line Loading @@ -2593,3 +2593,15 @@ sun4v_mmustat_info: retl nop .size sun4v_mmustat_info, .-sun4v_mmustat_info .globl sun4v_mmu_demap_all .type sun4v_mmu_demap_all,#function sun4v_mmu_demap_all: clr %o0 clr %o1 mov HV_MMU_ALL, %o2 mov HV_FAST_MMU_DEMAP_ALL, %o5 ta HV_FAST_TRAP retl nop .size sun4v_mmu_demap_all, .-sun4v_mmu_demap_all
arch/sparc64/mm/init.c +20 −9 Original line number Diff line number Diff line Loading @@ -1133,14 +1133,9 @@ static void __init mark_kpte_bitmap(unsigned long start, unsigned long end) } } static void __init kernel_physical_mapping_init(void) static void __init init_kpte_bitmap(void) { unsigned long i; #ifdef CONFIG_DEBUG_PAGEALLOC unsigned long mem_alloced = 0UL; #endif read_obp_memory("reg", &pall[0], &pall_ents); for (i = 0; i < pall_ents; i++) { unsigned long phys_start, phys_end; Loading @@ -1149,14 +1144,24 @@ static void __init kernel_physical_mapping_init(void) phys_end = phys_start + pall[i].reg_size; mark_kpte_bitmap(phys_start, phys_end); } } static void __init kernel_physical_mapping_init(void) { #ifdef CONFIG_DEBUG_PAGEALLOC unsigned long i, mem_alloced = 0UL; for (i = 0; i < pall_ents; i++) { unsigned long phys_start, phys_end; phys_start = pall[i].phys_addr; phys_end = phys_start + pall[i].reg_size; mem_alloced += kernel_map_range(phys_start, phys_end, PAGE_KERNEL); #endif } #ifdef CONFIG_DEBUG_PAGEALLOC printk("Allocated %ld bytes for kernel page tables.\n", mem_alloced); Loading Loading @@ -1398,6 +1403,10 @@ void __init paging_init(void) inherit_prom_mappings(); read_obp_memory("reg", &pall[0], &pall_ents); init_kpte_bitmap(); /* Ok, we can use our TLB miss and window trap handlers safely. */ setup_tba(); Loading Loading @@ -1904,7 +1913,9 @@ void __flush_tlb_all(void) "wrpr %0, %1, %%pstate" : "=r" (pstate) : "i" (PSTATE_IE)); if (tlb_type == spitfire) { if (tlb_type == hypervisor) { sun4v_mmu_demap_all(); } else if (tlb_type == spitfire) { for (i = 0; i < 64; i++) { /* Spitfire Errata #32 workaround */ /* NOTE: Always runs on spitfire, so no Loading
include/asm-sparc/unistd.h +9 −0 Original line number Diff line number Diff line Loading @@ -333,6 +333,15 @@ #define NR_SYSCALLS 315 /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, * it never had the plain ones and there is no value to adding those * old versions into the syscall table. */ #define __IGNORE_setresuid #define __IGNORE_getresuid #define __IGNORE_setresgid #define __IGNORE_getresgid #ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR Loading
include/asm-sparc64/hypervisor.h +4 −0 Original line number Diff line number Diff line Loading @@ -709,6 +709,10 @@ extern unsigned long sun4v_mmu_tsb_ctx0(unsigned long num_descriptions, */ #define HV_FAST_MMU_DEMAP_ALL 0x24 #ifndef __ASSEMBLY__ extern void sun4v_mmu_demap_all(void); #endif /* mmu_map_perm_addr() * TRAP: HV_FAST_TRAP * FUNCTION: HV_FAST_MMU_MAP_PERM_ADDR Loading