Commit de55cbff authored by Sathishkumar S's avatar Sathishkumar S Committed by Alex Deucher
Browse files

drm/amdgpu/vcn: Add regdump helper functions 



Add generic helper functions for vcn devcoredump support
which can be re-used for all vcn versions.

Signed-off-by: default avatarSathishkumar S <sathishkumar.sundararaju@amd.com>
Acked-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e6c2b0f2

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

+87 −0
Original line number Diff line number Diff line
@@ -92,6 +92,7 @@ MODULE_FIRMWARE(FIRMWARE_VCN5_0_0); 
MODULE_FIRMWARE(FIRMWARE_VCN5_0_1);



static void amdgpu_vcn_idle_work_handler(struct work_struct *work);

static void amdgpu_vcn_reg_dump_fini(struct amdgpu_device *adev);



int amdgpu_vcn_early_init(struct amdgpu_device *adev, int i)

{
@@ -285,6 +286,10 @@ int amdgpu_vcn_sw_fini(struct amdgpu_device *adev, int i) 
		amdgpu_ucode_release(&adev->vcn.inst[0].fw);

		adev->vcn.inst[i].fw = NULL;

	}



	if (adev->vcn.reg_list)

		amdgpu_vcn_reg_dump_fini(adev);



	mutex_destroy(&adev->vcn.inst[i].vcn_pg_lock);

	mutex_destroy(&adev->vcn.inst[i].vcn1_jpeg1_workaround);
@@ -1527,3 +1532,85 @@ int amdgpu_vcn_ring_reset(struct amdgpu_ring *ring, 


	return amdgpu_vcn_reset_engine(adev, ring->me);

}



int amdgpu_vcn_reg_dump_init(struct amdgpu_device *adev,

			     const struct amdgpu_hwip_reg_entry *reg, u32 count)

{

	adev->vcn.ip_dump = kcalloc(adev->vcn.num_vcn_inst * count,

				     sizeof(uint32_t), GFP_KERNEL);

	if (!adev->vcn.ip_dump)

		return -ENOMEM;

	adev->vcn.reg_list = reg;

	adev->vcn.reg_count = count;



	return 0;

}



static void amdgpu_vcn_reg_dump_fini(struct amdgpu_device *adev)

{

	kfree(adev->vcn.ip_dump);

	adev->vcn.reg_list = NULL;

	adev->vcn.reg_count = 0;

}



void amdgpu_vcn_dump_ip_state(struct amdgpu_ip_block *ip_block)

{

	struct amdgpu_device *adev = ip_block->adev;

	int i, j;

	bool is_powered;

	u32 inst_off;



	if (!adev->vcn.ip_dump)

		return;



	for (i = 0; i < adev->vcn.num_vcn_inst; i++) {

		if (adev->vcn.harvest_config & (1 << i))

			continue;



		inst_off = i * adev->vcn.reg_count;

		/* mmUVD_POWER_STATUS is always readable and is the first in reg_list */

		adev->vcn.ip_dump[inst_off] =

			RREG32(SOC15_REG_ENTRY_OFFSET_INST(adev->vcn.reg_list[0], i));

		is_powered = (adev->vcn.ip_dump[inst_off] &

			      UVD_POWER_STATUS__UVD_POWER_STATUS_TILES_OFF) !=

			      UVD_POWER_STATUS__UVD_POWER_STATUS_TILES_OFF;



		if (is_powered)

			for (j = 1; j < adev->vcn.reg_count; j++)

				adev->vcn.ip_dump[inst_off + j] =

				RREG32(SOC15_REG_ENTRY_OFFSET_INST(adev->vcn.reg_list[j], i));

	}

}



void amdgpu_vcn_print_ip_state(struct amdgpu_ip_block *ip_block, struct drm_printer *p)

{

	struct amdgpu_device *adev = ip_block->adev;

	int i, j;

	bool is_powered;

	u32 inst_off;



	if (!adev->vcn.ip_dump)

		return;



	drm_printf(p, "num_instances:%d\n", adev->vcn.num_vcn_inst);

	for (i = 0; i < adev->vcn.num_vcn_inst; i++) {

		if (adev->vcn.harvest_config & (1 << i)) {

			drm_printf(p, "\nHarvested Instance:VCN%d Skipping dump\n", i);

			continue;

		}



		inst_off = i * adev->vcn.reg_count;

		is_powered = (adev->vcn.ip_dump[inst_off] &

			      UVD_POWER_STATUS__UVD_POWER_STATUS_TILES_OFF) !=

			      UVD_POWER_STATUS__UVD_POWER_STATUS_TILES_OFF;



		if (is_powered) {

			drm_printf(p, "\nActive Instance:VCN%d\n", i);

			for (j = 0; j < adev->vcn.reg_count; j++)

				drm_printf(p, "%-50s \t 0x%08x\n", adev->vcn.reg_list[j].reg_name,

					   adev->vcn.ip_dump[inst_off + j]);

		} else {

			drm_printf(p, "\nInactive Instance:VCN%d\n", i);

		}

	}

}

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

+8 −0
Original line number Diff line number Diff line
@@ -237,6 +237,8 @@ 


#define AMDGPU_DRM_KEY_INJECT_WORKAROUND_VCNFW_ASD_HANDSHAKING 2



struct amdgpu_hwip_reg_entry;



enum amdgpu_vcn_caps {

	AMDGPU_VCN_RRMT_ENABLED,

};
@@ -362,6 +364,8 @@ struct amdgpu_vcn { 


	bool			workload_profile_active;

	struct mutex            workload_profile_mutex;

	u32 reg_count;

	const struct amdgpu_hwip_reg_entry *reg_list;

};



struct amdgpu_fw_shared_rb_ptrs_struct {
@@ -557,4 +561,8 @@ int vcn_set_powergating_state(struct amdgpu_ip_block *ip_block, 
int amdgpu_vcn_ring_reset(struct amdgpu_ring *ring,

			  unsigned int vmid,

			  struct amdgpu_fence *guilty_fence);

int amdgpu_vcn_reg_dump_init(struct amdgpu_device *adev,

			     const struct amdgpu_hwip_reg_entry *reg, u32 count);

void amdgpu_vcn_dump_ip_state(struct amdgpu_ip_block *ip_block);

void amdgpu_vcn_print_ip_state(struct amdgpu_ip_block *ip_block, struct drm_printer *p);

#endif