Commit de59b699 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/gmc: set a default disable value for AGP



To disable AGP, the start needs to be set to a higher
value than the end.  Set a default disable value for
the AGP aperture and allow the IP specific GMC code
to enable it selectively be calling amdgpu_gmc_agp_location().

Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 29495d81
Loading
Loading
Loading
Loading
+19 −8
Original line number Diff line number Diff line
@@ -316,14 +316,6 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
	const uint64_t sixteen_gb_mask = ~(sixteen_gb - 1);
	u64 size_af, size_bf;

	if (amdgpu_sriov_vf(adev)) {
		mc->agp_start = 0xffffffffffff;
		mc->agp_end = 0x0;
		mc->agp_size = 0;

		return;
	}

	if (mc->fb_start > mc->gart_start) {
		size_bf = (mc->fb_start & sixteen_gb_mask) -
			ALIGN(mc->gart_end + 1, sixteen_gb);
@@ -347,6 +339,25 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
			mc->agp_size >> 20, mc->agp_start, mc->agp_end);
}

/**
 * amdgpu_gmc_set_agp_default - Set the default AGP aperture value.
 * @adev: amdgpu device structure holding all necessary information
 * @mc: memory controller structure holding memory information
 *
 * To disable the AGP aperture, you need to set the start to a larger
 * value than the end.  This function sets the default value which
 * can then be overridden using amdgpu_gmc_agp_location() if you want
 * to enable the AGP aperture on a specific chip.
 *
 */
void amdgpu_gmc_set_agp_default(struct amdgpu_device *adev,
				struct amdgpu_gmc *mc)
{
	mc->agp_start = 0xffffffffffff;
	mc->agp_end = 0;
	mc->agp_size = 0;
}

/**
 * amdgpu_gmc_fault_key - get hask key from vm fault address and pasid
 *
+2 −0
Original line number Diff line number Diff line
@@ -394,6 +394,8 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev,
			      struct amdgpu_gmc *mc);
void amdgpu_gmc_agp_location(struct amdgpu_device *adev,
			     struct amdgpu_gmc *mc);
void amdgpu_gmc_set_agp_default(struct amdgpu_device *adev,
				struct amdgpu_gmc *mc);
bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev,
			      struct amdgpu_ih_ring *ih, uint64_t addr,
			      uint16_t pasid, uint64_t timestamp);
+3 −0
Original line number Diff line number Diff line
@@ -1062,6 +1062,9 @@ static const char * const amdgpu_vram_names[] = {
 */
int amdgpu_bo_init(struct amdgpu_device *adev)
{
	/* set the default AGP aperture state */
	amdgpu_gmc_set_agp_default(adev, &adev->gmc);

	/* On A+A platform, VRAM can be mapped as WB */
	if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu) {
		/* reserve PAT memory space to WC for VRAM */
+2 −1
Original line number Diff line number Diff line
@@ -671,6 +671,7 @@ static void gmc_v10_0_vram_gtt_location(struct amdgpu_device *adev,

	amdgpu_gmc_vram_location(adev, &adev->gmc, base);
	amdgpu_gmc_gart_location(adev, mc);
	if (!amdgpu_sriov_vf(adev))
		amdgpu_gmc_agp_location(adev, mc);

	/* base offset of vram pages */
+2 −1
Original line number Diff line number Diff line
@@ -635,6 +635,7 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,

	amdgpu_gmc_vram_location(adev, &adev->gmc, base);
	amdgpu_gmc_gart_location(adev, mc);
	if (!amdgpu_sriov_vf(adev))
		amdgpu_gmc_agp_location(adev, mc);

	/* base offset of vram pages */
Loading