Commit de8b24ab authored by Wei Fang's avatar Wei Fang Committed by Shawn Guo
Browse files

arm64: dts: imx95: add SMMU support for NETC 



The i.MX95 NETC supports SMMU, so add SMMU support.

Signed-off-by: default avatarWei Fang <wei.fang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 715dc11c

arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts

+8 −0
Original line number Diff line number Diff line
@@ -494,6 +494,14 @@ &netc_bus0 { 
		  <0x60 &its 0x66 0x1>, //ENETC1 VF1

		  <0x80 &its 0x64 0x1>, //ENETC2 PF

		  <0xc0 &its 0x67 0x1>;

	iommu-map = <0x0 &smmu 0x20 0x1>,

		    <0x10 &smmu 0x21 0x1>,

		    <0x20 &smmu 0x22 0x1>,

		    <0x40 &smmu 0x23 0x1>,

		    <0x50 &smmu 0x25 0x1>,

		    <0x60 &smmu 0x26 0x1>,

		    <0x80 &smmu 0x24 0x1>,

		    <0xc0 &smmu 0x27 0x1>;

};



&netc_emdio {

arch/arm64/boot/dts/freescale/imx95.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -1864,6 +1864,14 @@ netc_bus0: pcie@4ca00000 { 
					  <0x90 &its 0x65 0x1>, //ENETC2 VF0

					  <0xa0 &its 0x66 0x1>, //ENETC2 VF1

					  <0xc0 &its 0x67 0x1>; //NETC Timer

				iommu-map = <0x0 &smmu 0x20 0x1>,

					    <0x10 &smmu 0x21 0x1>,

					    <0x20 &smmu 0x22 0x1>,

					    <0x40 &smmu 0x23 0x1>,

					    <0x80 &smmu 0x24 0x1>,

					    <0x90 &smmu 0x25 0x1>,

					    <0xa0 &smmu 0x26 0x1>,

					    <0xc0 &smmu 0x27 0x1>;

					 /* ENETC0~2 and Timer BAR0 - non-prefetchable memory */

				ranges = <0x82000000 0x0 0x4cc00000  0x0 0x4cc00000  0x0 0xe0000

					 /* Timer BAR2 - prefetchable memory */