Commit de9637c9 authored by Hector Martin's avatar Hector Martin Committed by Manivannan Sadhasivam
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PCI: apple: Drop poll for CORE_RC_PHYIF_STAT_REFCLK 



This is checking a core refclk in per-port setup which doesn't make a
lot of sense, and the bootloader needs to have gone through this anyway.

It doesn't work on T602x, so just drop it across the board.

Signed-off-by: default avatarHector Martin <marcan@marcan.st>
Signed-off-by: default avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: default avatarJanne Grunau <j@jannau.net>
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: default avatarAlyssa Rosenzweig <alyssa@rosenzweig.io>
Link: https://patch.msgid.link/20250401091713.2765724-11-maz@kernel.org
parent 80b31fbb

drivers/pci/controller/pcie-apple.c

+0 −6
Original line number Diff line number Diff line
@@ -475,12 +475,6 @@ static int apple_pcie_setup_refclk(struct apple_pcie *pcie, 
	u32 stat;

	int res;



	res = readl_relaxed_poll_timeout(pcie->base + CORE_RC_PHYIF_STAT, stat,

					 stat & CORE_RC_PHYIF_STAT_REFCLK,

					 100, 50000);

	if (res < 0)

		return res;



	rmw_set(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL);

	rmw_set(PHY_LANE_CFG_REFCLK0REQ, port->phy + PHY_LANE_CFG);