Commit dea333b2 authored by Matthew Brost's avatar Matthew Brost
Browse files

drm/xe: Add has_ctx_tlb_inval to device info 



Add has_ctx_tlb_inval to device info indicating a device has context
basd TLB invalidation.

Signed-off-by: default avatarMatthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarStuart Summers <stuart.summers@intel.com>
Tested-by: default avatarStuart Summers <stuart.summers@intel.com>
Link: https://patch.msgid.link/20260116221731.868657-4-matthew.brost@intel.com
parent 444d7857

drivers/gpu/drm/xe/xe_device_types.h

+2 −0
Original line number Diff line number Diff line
@@ -353,6 +353,8 @@ struct xe_device { 
		u8 has_pre_prod_wa:1;

		/** @info.has_pxp: Device has PXP support */

		u8 has_pxp:1;

		/** @info.has_ctx_tlb_inval: Has context based TLB invalidations */

		u8 has_ctx_tlb_inval:1;

		/** @info.has_range_tlb_inval: Has range based TLB invalidations */

		u8 has_range_tlb_inval:1;

		/** @info.has_soc_remapper_sysctrl: Has SoC remapper system controller */

drivers/gpu/drm/xe/xe_pci.c

+1 −0
Original line number Diff line number Diff line
@@ -893,6 +893,7 @@ static int xe_info_init(struct xe_device *xe, 
		xe->info.has_device_atomics_on_smem = 1;



	xe->info.has_range_tlb_inval = graphics_desc->has_range_tlb_inval;

	xe->info.has_ctx_tlb_inval = graphics_desc->has_ctx_tlb_inval;

	xe->info.has_usm = graphics_desc->has_usm;

	xe->info.has_64bit_timestamp = graphics_desc->has_64bit_timestamp;

drivers/gpu/drm/xe/xe_pci_types.h

+1 −0
Original line number Diff line number Diff line
@@ -72,6 +72,7 @@ struct xe_graphics_desc { 
	u8 has_atomic_enable_pte_bit:1;

	u8 has_indirect_ring_state:1;

	u8 has_range_tlb_inval:1;

	u8 has_ctx_tlb_inval:1;

	u8 has_usm:1;

	u8 has_64bit_timestamp:1;

};