Commit df0b394f authored by Karol Kolacinski's avatar Karol Kolacinski Committed by Tony Nguyen
Browse files

ice: Disable shared pin on E810 on setfunc 



When setting a new supported function for a pin on E810, disable other
enabled pin that shares the same GPIO.

Reviewed-by: default avatarArkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent d755a7e1

drivers/net/ethernet/intel/ice/ice_ptp.c

+65 −0
Original line number Diff line number Diff line
@@ -1838,6 +1838,63 @@ static void ice_ptp_enable_all_perout(struct ice_pf *pf) 
					   true);

}



/**

 * ice_ptp_disable_shared_pin - Disable enabled pin that shares GPIO

 * @pf: Board private structure

 * @pin: Pin index

 * @func: Assigned function

 *

 * Return: 0 on success, negative error code otherwise

 */

static int ice_ptp_disable_shared_pin(struct ice_pf *pf, unsigned int pin,

				      enum ptp_pin_function func)

{

	unsigned int gpio_pin;



	switch (func) {

	case PTP_PF_PEROUT:

		gpio_pin = pf->ptp.ice_pin_desc[pin].gpio[1];

		break;

	case PTP_PF_EXTTS:

		gpio_pin = pf->ptp.ice_pin_desc[pin].gpio[0];

		break;

	default:

		return -EOPNOTSUPP;

	}



	for (unsigned int i = 0; i < pf->ptp.info.n_pins; i++) {

		struct ptp_pin_desc *pin_desc = &pf->ptp.pin_desc[i];

		unsigned int chan = pin_desc->chan;



		/* Skip pin idx from the request */

		if (i == pin)

			continue;



		if (pin_desc->func == PTP_PF_PEROUT &&

		    pf->ptp.ice_pin_desc[i].gpio[1] == gpio_pin) {

			pf->ptp.perout_rqs[chan].period.sec = 0;

			pf->ptp.perout_rqs[chan].period.nsec = 0;

			pin_desc->func = PTP_PF_NONE;

			pin_desc->chan = 0;

			dev_dbg(ice_pf_to_dev(pf), "Disabling pin %u with shared output GPIO pin %u\n",

				i, gpio_pin);

			return ice_ptp_cfg_perout(pf, &pf->ptp.perout_rqs[chan],

						  false);

		} else if (pf->ptp.pin_desc->func == PTP_PF_EXTTS &&

			   pf->ptp.ice_pin_desc[i].gpio[0] == gpio_pin) {

			pf->ptp.extts_rqs[chan].flags &= ~PTP_ENABLE_FEATURE;

			pin_desc->func = PTP_PF_NONE;

			pin_desc->chan = 0;

			dev_dbg(ice_pf_to_dev(pf), "Disabling pin %u with shared input GPIO pin %u\n",

				i, gpio_pin);

			return ice_ptp_cfg_extts(pf, &pf->ptp.extts_rqs[chan],

						 false);

		}

	}



	return 0;

}



/**

 * ice_verify_pin - verify if pin supports requested pin function

 * @info: the driver's PTP info structure
@@ -1872,6 +1929,14 @@ static int ice_verify_pin(struct ptp_clock_info *info, unsigned int pin, 
		return -EOPNOTSUPP;

	}



	/* On adapters with SMA_CTRL disable other pins that share same GPIO */

	if (ice_is_feature_supported(pf, ICE_F_SMA_CTRL)) {

		ice_ptp_disable_shared_pin(pf, pin, func);

		pf->ptp.pin_desc[pin].func = func;

		pf->ptp.pin_desc[pin].chan = chan;

		return ice_ptp_set_sma_cfg(pf);

	}



	return 0;

}