Commit dfbd7dda authored by Rafał Miłecki's avatar Rafał Miłecki Committed by Brian Norris
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mtd: bcm47xxnflash: NAND_CMD_RESET support 



Signed-off-by: default avatarRafał Miłecki <zajec5@gmail.com>
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent 90de6332

drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c

+5 −1
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#include <linux/module.h>

#include <linux/kernel.h>

#include <linux/slab.h>

#include <linux/delay.h>

#include <linux/bcma/bcma.h>



/* Broadcom uses 1'000'000 but it seems to be too many. Tests on WNDR4500 has
@@ -226,7 +227,10 @@ static void bcm47xxnflash_ops_bcm4706_cmdfunc(struct mtd_info *mtd, 


	switch (command) {

	case NAND_CMD_RESET:

		pr_warn("Chip reset not implemented yet\n");

		nand_chip->cmd_ctrl(mtd, command, NAND_CTRL_CLE);



		ndelay(100);

		nand_wait_ready(mtd);

		break;

	case NAND_CMD_READID:

		ctlcode = NCTL_CSA | 0x01000000 | NCTL_CMD1W | NCTL_CMD0;