Commit e00a2e5d authored by Imre Deak's avatar Imre Deak
Browse files

drm: Fix DSC BPP increment decoding 



Starting with DPCD version 2.0 bits 6:3 of the DP_DSC_BITS_PER_PIXEL_INC
DPCD register contains the NativeYCbCr422_MAX_bpp_DELTA field, which can
be non-zero as opposed to earlier DPCD versions, hence decoding the
bit_per_pixel increment value at bits 2:0 in the same register requires
applying a mask, do so.

Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Fixes: 0c2287c9 ("drm/display/dp: Add helper function to get DSC bpp precision")
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250212161851.4007005-1-imre.deak@intel.com
parent 9ab127a1

drivers/gpu/drm/display/drm_dp_helper.c

+1 −1
Original line number Diff line number Diff line
@@ -2544,7 +2544,7 @@ u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) 
{

	u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT];



	switch (bpp_increment_dpcd) {

	switch (bpp_increment_dpcd & DP_DSC_BITS_PER_PIXEL_MASK) {

	case DP_DSC_BITS_PER_PIXEL_1_16:

		return 16;

	case DP_DSC_BITS_PER_PIXEL_1_8:

include/drm/display/drm_dp.h

+1 −0
Original line number Diff line number Diff line
@@ -359,6 +359,7 @@ 
# define DP_DSC_BITS_PER_PIXEL_1_4          0x2

# define DP_DSC_BITS_PER_PIXEL_1_2          0x3

# define DP_DSC_BITS_PER_PIXEL_1_1          0x4

# define DP_DSC_BITS_PER_PIXEL_MASK         0x7



#define DP_PSR_SUPPORT                      0x070   /* XXX 1.2? */

# define DP_PSR_IS_SUPPORTED                1