Commit e01f07cb authored by Lo-an Chen's avatar Lo-an Chen Committed by Alex Deucher
Browse files

drm/amd/display: Fix seamless boot sequence 



[WHY]
When the system powers up eDP with external monitors in seamless boot
sequence, stutter get enabled before TTU and HUBP registers being
programmed, which resulting in underflow.

[HOW]
Enable TTU in hubp_init.
Change the sequence that do not perpare_bandwidth and optimize_bandwidth
while having seamless boot streams.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarLo-an Chen <lo-an.chen@amd.com>
Signed-off-by: default avatarPaul Hsieh <paul.hsieh@amd.com>
Signed-off-by: default avatarAlex Hung <alex.hung@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8adbb2a9

drivers/gpu/drm/amd/display/dc/core/dc.c

+1 −1
Original line number Diff line number Diff line
@@ -2133,7 +2133,7 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c 


	dc_enable_stereo(dc, context, dc_streams, context->stream_count);



	if (context->stream_count > get_seamless_boot_stream_count(context) ||

	if (get_seamless_boot_stream_count(context) == 0 ||

		context->stream_count == 0) {

		/* Must wait for no flips to be pending before doing optimize bw */

		hwss_wait_for_no_pipes_pending(dc, context);

drivers/gpu/drm/amd/display/dc/hubbub/dcn30/dcn30_hubbub.c

+2 −1
Original line number Diff line number Diff line
@@ -129,6 +129,7 @@ bool hubbub3_program_watermarks( 
	REG_UPDATE(DCHUBBUB_ARB_DF_REQ_OUTSTAND,

			DCHUBBUB_ARB_MIN_REQ_OUTSTAND, 0x1FF);



	if (safe_to_lower || hubbub->ctx->dc->debug.disable_stutter)

		hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter);



	return wm_pending;

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

+2 −1
Original line number Diff line number Diff line
@@ -750,6 +750,7 @@ static bool hubbub31_program_watermarks( 
	REG_UPDATE(DCHUBBUB_ARB_DF_REQ_OUTSTAND,

			DCHUBBUB_ARB_MIN_REQ_OUTSTAND, 0x1FF);*/



	if (safe_to_lower || hubbub->ctx->dc->debug.disable_stutter)

		hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter);

	return wm_pending;

}

drivers/gpu/drm/amd/display/dc/hubbub/dcn32/dcn32_hubbub.c

+2 −1
Original line number Diff line number Diff line
@@ -786,6 +786,7 @@ static bool hubbub32_program_watermarks( 
	REG_UPDATE(DCHUBBUB_ARB_DF_REQ_OUTSTAND,

			DCHUBBUB_ARB_MIN_REQ_OUTSTAND, 0x1FF);*/



	if (safe_to_lower || hubbub->ctx->dc->debug.disable_stutter)

		hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter);



	hubbub32_force_usr_retraining_allow(hubbub, hubbub->ctx->dc->debug.force_usr_allow);

drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c

+2 −1
Original line number Diff line number Diff line
@@ -326,6 +326,7 @@ static bool hubbub35_program_watermarks( 
			DCHUBBUB_ARB_MIN_REQ_OUTSTAND_COMMIT_THRESHOLD, 0xA);/*hw delta*/

	REG_UPDATE(DCHUBBUB_ARB_HOSTVM_CNTL, DCHUBBUB_ARB_MAX_QOS_COMMIT_THRESHOLD, 0xF);



	if (safe_to_lower || hubbub->ctx->dc->debug.disable_stutter)

		hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter);



	hubbub32_force_usr_retraining_allow(hubbub, hubbub->ctx->dc->debug.force_usr_allow);