Commit e108c8a9 authored by Radim Krčmář's avatar Radim Krčmář Committed by Paul Walmsley
Browse files

riscv: use lw when reading int cpu in new_vmalloc_check 



REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.

Fixes: 503638e0 ("riscv: Stop emitting preventive sfence.vma for new vmalloc mappings")
Cc: stable@vger.kernel.org
Reviewed-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: default avatarRadim Krčmář <rkrcmar@ventanamicro.com>
Link: https://lore.kernel.org/r/20250725165410.2896641-4-rkrcmar@ventanamicro.com


Signed-off-by: default avatarPaul Walmsley <pjw@kernel.org>
parent 5b370659

arch/riscv/kernel/entry.S

+1 −1
Original line number Diff line number Diff line
@@ -46,7 +46,7 @@ 
	 * a0 = &new_vmalloc[BIT_WORD(cpu)]

	 * a1 = BIT_MASK(cpu)

	 */

	REG_L 	a2, TASK_TI_CPU(tp)

	lw	a2, TASK_TI_CPU(tp)

	/*

	 * Compute the new_vmalloc element position:

	 * (cpu / 64) * 8 = (cpu >> 6) << 3