Loading arch/arm/boot/dts/sun4i-a10.dtsi +3 −1 Original line number Diff line number Diff line Loading @@ -18,11 +18,13 @@ memory { }; soc { pinctrl@01c20800 { pio: pinctrl@01c20800 { compatible = "allwinner,sun4i-a10-pinctrl"; reg = <0x01c20800 0x400>; gpio-controller; #address-cells = <1>; #size-cells = <0>; #gpio-cells = <3>; uart0_pins_a: uart0@0 { allwinner,pins = "PB22", "PB23"; Loading arch/arm/boot/dts/sun5i-a13.dtsi +3 −1 Original line number Diff line number Diff line Loading @@ -19,11 +19,13 @@ memory { }; soc { pinctrl@01c20800 { pio: pinctrl@01c20800 { compatible = "allwinner,sun5i-a13-pinctrl"; reg = <0x01c20800 0x400>; gpio-controller; #address-cells = <1>; #size-cells = <0>; #gpio-cells = <3>; uart1_pins_a: uart1@0 { allwinner,pins = "PE10", "PE11"; Loading Loading
arch/arm/boot/dts/sun4i-a10.dtsi +3 −1 Original line number Diff line number Diff line Loading @@ -18,11 +18,13 @@ memory { }; soc { pinctrl@01c20800 { pio: pinctrl@01c20800 { compatible = "allwinner,sun4i-a10-pinctrl"; reg = <0x01c20800 0x400>; gpio-controller; #address-cells = <1>; #size-cells = <0>; #gpio-cells = <3>; uart0_pins_a: uart0@0 { allwinner,pins = "PB22", "PB23"; Loading
arch/arm/boot/dts/sun5i-a13.dtsi +3 −1 Original line number Diff line number Diff line Loading @@ -19,11 +19,13 @@ memory { }; soc { pinctrl@01c20800 { pio: pinctrl@01c20800 { compatible = "allwinner,sun5i-a13-pinctrl"; reg = <0x01c20800 0x400>; gpio-controller; #address-cells = <1>; #size-cells = <0>; #gpio-cells = <3>; uart1_pins_a: uart1@0 { allwinner,pins = "PE10", "PE11"; Loading