Loading arch/mips/kernel/irq-msc01.c +24 −27 Original line number Diff line number Diff line Loading @@ -28,8 +28,10 @@ static unsigned long _icctrl_msc; static unsigned int irq_base; /* mask off an interrupt */ static inline void mask_msc_irq(unsigned int irq) static inline void mask_msc_irq(struct irq_data *d) { unsigned int irq = d->irq; if (irq < (irq_base + 32)) MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base)); else Loading @@ -37,8 +39,10 @@ static inline void mask_msc_irq(unsigned int irq) } /* unmask an interrupt */ static inline void unmask_msc_irq(unsigned int irq) static inline void unmask_msc_irq(struct irq_data *d) { unsigned int irq = d->irq; if (irq < (irq_base + 32)) MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base)); else Loading @@ -48,9 +52,11 @@ static inline void unmask_msc_irq(unsigned int irq) /* * Masks and ACKs an IRQ */ static void level_mask_and_ack_msc_irq(unsigned int irq) static void level_mask_and_ack_msc_irq(struct irq_data *d) { mask_msc_irq(irq); unsigned int irq = d->irq; mask_msc_irq(d); if (!cpu_has_veic) MSCIC_WRITE(MSC01_IC_EOI, 0); /* This actually needs to be a call into platform code */ Loading @@ -60,9 +66,11 @@ static void level_mask_and_ack_msc_irq(unsigned int irq) /* * Masks and ACKs an IRQ */ static void edge_mask_and_ack_msc_irq(unsigned int irq) static void edge_mask_and_ack_msc_irq(struct irq_data *d) { mask_msc_irq(irq); unsigned int irq = d->irq; mask_msc_irq(d); if (!cpu_has_veic) MSCIC_WRITE(MSC01_IC_EOI, 0); else { Loading @@ -74,15 +82,6 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq) smtc_im_ack_irq(irq); } /* * End IRQ processing */ static void end_msc_irq(unsigned int irq) { if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) unmask_msc_irq(irq); } /* * Interrupt handler for interrupts coming from SOC-it. */ Loading @@ -107,22 +106,20 @@ static void msc_bind_eic_interrupt(int irq, int set) static struct irq_chip msc_levelirq_type = { .name = "SOC-it-Level", .ack = level_mask_and_ack_msc_irq, .mask = mask_msc_irq, .mask_ack = level_mask_and_ack_msc_irq, .unmask = unmask_msc_irq, .eoi = unmask_msc_irq, .end = end_msc_irq, .irq_ack = level_mask_and_ack_msc_irq, .irq_mask = mask_msc_irq, .irq_mask_ack = level_mask_and_ack_msc_irq, .irq_unmask = unmask_msc_irq, .irq_eoi = unmask_msc_irq, }; static struct irq_chip msc_edgeirq_type = { .name = "SOC-it-Edge", .ack = edge_mask_and_ack_msc_irq, .mask = mask_msc_irq, .mask_ack = edge_mask_and_ack_msc_irq, .unmask = unmask_msc_irq, .eoi = unmask_msc_irq, .end = end_msc_irq, .irq_ack = edge_mask_and_ack_msc_irq, .irq_mask = mask_msc_irq, .irq_mask_ack = edge_mask_and_ack_msc_irq, .irq_unmask = unmask_msc_irq, .irq_eoi = unmask_msc_irq, }; Loading Loading
arch/mips/kernel/irq-msc01.c +24 −27 Original line number Diff line number Diff line Loading @@ -28,8 +28,10 @@ static unsigned long _icctrl_msc; static unsigned int irq_base; /* mask off an interrupt */ static inline void mask_msc_irq(unsigned int irq) static inline void mask_msc_irq(struct irq_data *d) { unsigned int irq = d->irq; if (irq < (irq_base + 32)) MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base)); else Loading @@ -37,8 +39,10 @@ static inline void mask_msc_irq(unsigned int irq) } /* unmask an interrupt */ static inline void unmask_msc_irq(unsigned int irq) static inline void unmask_msc_irq(struct irq_data *d) { unsigned int irq = d->irq; if (irq < (irq_base + 32)) MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base)); else Loading @@ -48,9 +52,11 @@ static inline void unmask_msc_irq(unsigned int irq) /* * Masks and ACKs an IRQ */ static void level_mask_and_ack_msc_irq(unsigned int irq) static void level_mask_and_ack_msc_irq(struct irq_data *d) { mask_msc_irq(irq); unsigned int irq = d->irq; mask_msc_irq(d); if (!cpu_has_veic) MSCIC_WRITE(MSC01_IC_EOI, 0); /* This actually needs to be a call into platform code */ Loading @@ -60,9 +66,11 @@ static void level_mask_and_ack_msc_irq(unsigned int irq) /* * Masks and ACKs an IRQ */ static void edge_mask_and_ack_msc_irq(unsigned int irq) static void edge_mask_and_ack_msc_irq(struct irq_data *d) { mask_msc_irq(irq); unsigned int irq = d->irq; mask_msc_irq(d); if (!cpu_has_veic) MSCIC_WRITE(MSC01_IC_EOI, 0); else { Loading @@ -74,15 +82,6 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq) smtc_im_ack_irq(irq); } /* * End IRQ processing */ static void end_msc_irq(unsigned int irq) { if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) unmask_msc_irq(irq); } /* * Interrupt handler for interrupts coming from SOC-it. */ Loading @@ -107,22 +106,20 @@ static void msc_bind_eic_interrupt(int irq, int set) static struct irq_chip msc_levelirq_type = { .name = "SOC-it-Level", .ack = level_mask_and_ack_msc_irq, .mask = mask_msc_irq, .mask_ack = level_mask_and_ack_msc_irq, .unmask = unmask_msc_irq, .eoi = unmask_msc_irq, .end = end_msc_irq, .irq_ack = level_mask_and_ack_msc_irq, .irq_mask = mask_msc_irq, .irq_mask_ack = level_mask_and_ack_msc_irq, .irq_unmask = unmask_msc_irq, .irq_eoi = unmask_msc_irq, }; static struct irq_chip msc_edgeirq_type = { .name = "SOC-it-Edge", .ack = edge_mask_and_ack_msc_irq, .mask = mask_msc_irq, .mask_ack = edge_mask_and_ack_msc_irq, .unmask = unmask_msc_irq, .eoi = unmask_msc_irq, .end = end_msc_irq, .irq_ack = edge_mask_and_ack_msc_irq, .irq_mask = mask_msc_irq, .irq_mask_ack = edge_mask_and_ack_msc_irq, .irq_unmask = unmask_msc_irq, .irq_eoi = unmask_msc_irq, }; Loading