Commit e18c3f5c authored by Friday Yang's avatar Friday Yang Committed by Krzysztof Kozlowski
Browse files

memory: mtk-smi: Add ostd setting for mt8186 



Add initial ostd setting for mt8186. All the settings come from DE.
These settings help adjust Multimedia HW's bandwidth limits to achieve
a balanced bandwidth requirement. Without this, the VENC HW works
abnormal while stress testing.

Fixes: 86a010bf ("memory: mtk-smi: mt8186: Add smi support")
Signed-off-by: default avatarFriday Yang <friday.yang@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250521091626.4283-1-friday.yang@mediatek.com


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 04de5016

drivers/memory/mtk-smi.c

+33 −0
Original line number Diff line number Diff line
@@ -320,6 +320,38 @@ static const u8 mtk_smi_larb_mt6893_ostd[][SMI_LARB_PORT_NR_MAX] = { 
	[20] = {0x9, 0x9, 0x5, 0x5, 0x1, 0x1},

};



static const u8 mtk_smi_larb_mt8186_ostd[][SMI_LARB_PORT_NR_MAX] = {

	[0] = {0x2, 0x1, 0x8, 0x1,},

	[1] = {0x1, 0x3, 0x1, 0x1,},

	[2] = {0x6, 0x1, 0x4, 0x1,},

	[3] = {},

	[4] = {0xf, 0x1, 0x5, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1,

	       0x1, 0x1, 0x1,},

	[5] = {},

	[6] = {},

	[7] = {0x1, 0x3, 0x1, 0x1, 0x1, 0x3, 0x2, 0xd, 0x7, 0x5, 0x3,

	       0x1, 0x5,},

	[8] = {0x1, 0x2, 0x2,},

	[9] = {0x9, 0x7, 0xf, 0x8, 0x1, 0x8, 0x9, 0x3, 0x3, 0xb, 0x7, 0x4,

	       0x9, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1,

	       0x1, 0x1, 0x1, 0x1, 0x1,},

	[10] = {},

	[11] = {0x9, 0x7, 0xf, 0x8, 0x1, 0x8, 0x9, 0x3, 0x3, 0xb, 0x7, 0x4,

		0x9, 0x1, 0x1, 0x1, 0x1, 0x1, 0x8, 0x7, 0x7, 0x1, 0x6, 0x2,

		0xf, 0x8, 0x1, 0x1, 0x1,},

	[12] = {},

	[13] = {0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x6, 0x6, 0x6, 0x1, 0x1, 0x1,},

	[14] = {0x1, 0x1, 0x1, 0x1, 0x1, 0x1,},

	[15] = {},

	[16] = {0x28, 0x14, 0x2, 0xc, 0x18, 0x1, 0x14, 0x1, 0x4, 0x4, 0x4,

		0x2, 0x4, 0x2, 0x8, 0x4, 0x4,},

	[17] = {0x28, 0x14, 0x2, 0xc, 0x18, 0x1, 0x14, 0x1, 0x4, 0x4, 0x4,

		0x2, 0x4, 0x2, 0x8, 0x4, 0x4,},

	[18] = {},

	[19] = {0x1, 0x1, 0x1, 0x1,},

	[20] = {0x2, 0x2, 0x2, 0x2, 0x1, 0x1,},

};



static const u8 mtk_smi_larb_mt8188_ostd[][SMI_LARB_PORT_NR_MAX] = {

	[0] = {0x02, 0x18, 0x22, 0x22, 0x01, 0x02, 0x0a,},

	[1] = {0x12, 0x02, 0x14, 0x14, 0x01, 0x18, 0x0a,},
@@ -491,6 +523,7 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt8183 = { 
static const struct mtk_smi_larb_gen mtk_smi_larb_mt8186 = {

	.config_port                = mtk_smi_larb_config_port_gen2_general,

	.flags_general	            = MTK_SMI_FLAG_SLEEP_CTL,

	.ostd			    = mtk_smi_larb_mt8186_ostd,

};



static const struct mtk_smi_larb_gen mtk_smi_larb_mt8188 = {