Commit e1d47850 authored by Leo Yan's avatar Leo Yan Committed by Namhyung Kim
Browse files

perf arm-spe: Fix load-store operation checking



The ARM_SPE_OP_LD and ARM_SPE_OP_ST operations are secondary operation
type, they are overlapping with other second level's operation types
belonging to SVE and branch operations.  As a result, a non load-store
operation can be parsed for data source and memory sample.

To fix the issue, this commit introduces a is_ldst_op() macro for
checking LDST operation, and apply the checking when synthesize data
source and memory samples.

Fixes: a89dbc9b ("perf arm-spe: Set sample's data source field")
Signed-off-by: default avatarLeo Yan <leo.yan@arm.com>
Reviewed-by: default avatarJames Clark <james.clark@linaro.org>
Link: https://lore.kernel.org/r/20250304111240.3378214-7-leo.yan@arm.com


Signed-off-by: default avatarNamhyung Kim <namhyung@kernel.org>
parent 1e66dcff
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+7 −1
Original line number Diff line number Diff line
@@ -37,6 +37,8 @@
#include "../../arch/arm64/include/asm/cputype.h"
#define MAX_TIMESTAMP (~0ULL)

#define is_ldst_op(op)		(!!((op) & ARM_SPE_OP_LDST))

struct arm_spe {
	struct auxtrace			auxtrace;
	struct auxtrace_queues		queues;
@@ -681,6 +683,10 @@ static u64 arm_spe__synth_data_source(struct arm_spe_queue *speq,
{
	union perf_mem_data_src	data_src = { .mem_op = PERF_MEM_OP_NA };

	/* Only synthesize data source for LDST operations */
	if (!is_ldst_op(record->op))
		return 0;

	if (record->op & ARM_SPE_OP_LD)
		data_src.mem_op = PERF_MEM_OP_LOAD;
	else if (record->op & ARM_SPE_OP_ST)
@@ -779,7 +785,7 @@ static int arm_spe_sample(struct arm_spe_queue *speq)
	 * When data_src is zero it means the record is not a memory operation,
	 * skip to synthesize memory sample for this case.
	 */
	if (spe->sample_memory && data_src) {
	if (spe->sample_memory && is_ldst_op(record->op)) {
		err = arm_spe__synth_mem_sample(speq, spe->memory_id, data_src);
		if (err)
			return err;