Commit e1dce564 authored by Gowthami Thiagarajan's avatar Gowthami Thiagarajan Committed by Will Deacon
Browse files

perf/marvell: Marvell PEM performance monitor support 



PCI Express Interface PMU includes various performance counters
to monitor the data that is transmitted over the PCIe link. The
counters track various inbound and outbound transactions which
includes separate counters for posted/non-posted/completion TLPs.
Also, inbound and outbound memory read requests along with their
latencies can also be monitored. Address Translation Services(ATS)events
such as ATS Translation, ATS Page Request, ATS Invalidation along with
their corresponding latencies are also supported.

The performance counters are 64 bits wide.

For instance,
perf stat -e ib_tlp_pr <workload>
tracks the inbound posted TLPs for the workload.

Co-developed-by: default avatarLinu Cherian <lcherian@marvell.com>
Signed-off-by: default avatarLinu Cherian <lcherian@marvell.com>
Signed-off-by: default avatarGowthami Thiagarajan <gthiagarajan@marvell.com>
Link: https://lore.kernel.org/r/20241028055309.17893-1-gthiagarajan@marvell.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 0bbff9ed

Documentation/admin-guide/perf/index.rst

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@@ -26,3 +26,4 @@ Performance monitor support 
   meson-ddr-pmu

   cxl

   ampere_cspmu

   mrvl-pem-pmu

Documentation/admin-guide/perf/mrvl-pem-pmu.rst

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=================================================================

Marvell Odyssey PEM Performance Monitoring Unit (PMU UNCORE)

=================================================================



The PCI Express Interface Units(PEM) are associated with a corresponding

monitoring unit. This includes performance counters to track various

characteristics of the data that is transmitted over the PCIe link.



The counters track inbound and outbound transactions which

includes separate counters for posted/non-posted/completion TLPs.

Also, inbound and outbound memory read requests along with their

latencies can also be monitored. Address Translation Services(ATS)events

such as ATS Translation, ATS Page Request, ATS Invalidation along with

their corresponding latencies are also tracked.



There are separate 64 bit counters to measure posted/non-posted/completion

tlps in inbound and outbound transactions. ATS events are measured by

different counters.



The PMU driver exposes the available events and format options under sysfs,

/sys/bus/event_source/devices/mrvl_pcie_rc_pmu_<>/events/

/sys/bus/event_source/devices/mrvl_pcie_rc_pmu_<>/format/



Examples::



  # perf list | grep mrvl_pcie_rc_pmu

  mrvl_pcie_rc_pmu_<>/ats_inv/             [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ats_inv_latency/     [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ats_pri/             [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ats_pri_latency/     [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ats_trans/           [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ats_trans_latency/   [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ib_inflight/         [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ib_reads/            [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ib_req_no_ro_ebus/   [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ib_req_no_ro_ncb/    [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ib_tlp_cpl_partid/   [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ib_tlp_dwords_cpl_partid/ [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ib_tlp_dwords_npr/   [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ib_tlp_dwords_pr/    [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ib_tlp_npr/          [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ib_tlp_pr/           [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ob_inflight_partid/  [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ob_merges_cpl_partid/ [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ob_merges_npr_partid/ [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ob_merges_pr_partid/ [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ob_reads_partid/     [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ob_tlp_cpl_partid/   [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ob_tlp_dwords_cpl_partid/ [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ob_tlp_dwords_npr_partid/ [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ob_tlp_dwords_pr_partid/ [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ob_tlp_npr_partid/   [Kernel PMU event]

  mrvl_pcie_rc_pmu_<>/ob_tlp_pr_partid/    [Kernel PMU event]





  # perf stat -e ib_inflight,ib_reads,ib_req_no_ro_ebus,ib_req_no_ro_ncb <workload>

MAINTAINERS

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@@ -13845,6 +13845,12 @@ S: Supported 
F:	Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst

F:	drivers/net/ethernet/marvell/octeontx2/af/









MARVELL PEM PMU DRIVER









M:	Linu Cherian <lcherian@marvell.com>









M:	Gowthami Thiagarajan <gthiagarajan@marvell.com>









S:	Supported









F:	drivers/perf/marvell_pem_pmu.c

















MARVELL PRESTERA ETHERNET SWITCH DRIVER









M:	Taras Chornyi <taras.chornyi@plvision.eu>









S:	Supported
































drivers/perf/Kconfig



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@@ -284,4 +284,11 @@ config CXL_PMU

















	  If unsure say 'm'.



















config MARVELL_PEM_PMU









	tristate "MARVELL PEM PMU Support"









	depends on ARCH_THUNDER || (COMPILE_TEST && 64BIT)









	help









	  Enable support for PCIe Interface performance monitoring









	  on Marvell platform.



















endmenu
























drivers/perf/Makefile



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@@ -26,6 +26,7 @@ obj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o







obj-$(CONFIG_ARM_DMC620_PMU) += arm_dmc620_pmu.o









obj-$(CONFIG_MARVELL_CN10K_TAD_PMU) += marvell_cn10k_tad_pmu.o









obj-$(CONFIG_MARVELL_CN10K_DDR_PMU) += marvell_cn10k_ddr_pmu.o









obj-$(CONFIG_MARVELL_PEM_PMU) += marvell_pem_pmu.o









obj-$(CONFIG_APPLE_M1_CPU_PMU) += apple_m1_cpu_pmu.o









obj-$(CONFIG_ALIBABA_UNCORE_DRW_PMU) += alibaba_uncore_drw_pmu.o









obj-$(CONFIG_DWC_PCIE_PMU) += dwc_pcie_pmu.o