Commit e200f4f7 authored by Michał Winiarski's avatar Michał Winiarski Committed by Bjorn Helgaas
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PCI/IOV: Allow IOV resources to be resized in pci_resize_resource() 



Similar to regular resizable BARs, VF BARs can also be resized.

The capability layout is the same as PCI_EXT_CAP_ID_REBAR, which means we
can reuse most of the implementation, the only difference being resource
size calculation (which is multiplied by total VFs) and memory decoding
(which is controlled by a separate VF MSE field in SR-IOV cap).

Extend the pci_resize_resource() function to accept IOV resources.

See PCIe r6.2, sec 7.8.7.

Signed-off-by: default avatarMichał Winiarski <michal.winiarski@intel.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://patch.msgid.link/20250702093522.518099-4-michal.winiarski@intel.com
parent 535bdbea

drivers/pci/iov.c

+21 −0
Original line number Diff line number Diff line
@@ -154,6 +154,27 @@ resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) 
	return dev->sriov->barsz[pci_resource_num_to_vf_bar(resno)];

}



void pci_iov_resource_set_size(struct pci_dev *dev, int resno,

			       resource_size_t size)

{

	if (!pci_resource_is_iov(resno)) {

		pci_warn(dev, "%s is not an IOV resource\n",

			 pci_resource_name(dev, resno));

		return;

	}



	dev->sriov->barsz[pci_resource_num_to_vf_bar(resno)] = size;

}



bool pci_iov_is_memory_decoding_enabled(struct pci_dev *dev)

{

	u16 cmd;



	pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_CTRL, &cmd);



	return cmd & PCI_SRIOV_CTRL_MSE;

}



static void pci_read_vf_config_common(struct pci_dev *virtfn)

{

	struct pci_dev *physfn = virtfn->physfn;

drivers/pci/pci.c

+7 −1
Original line number Diff line number Diff line
@@ -3752,7 +3752,13 @@ static int pci_rebar_find_pos(struct pci_dev *pdev, int bar) 
	unsigned int pos, nbars, i;

	u32 ctrl;



	if (pci_resource_is_iov(bar)) {

		pos = pci_iov_vf_rebar_cap(pdev);

		bar = pci_resource_num_to_vf_bar(bar);

	} else {

		pos = pdev->rebar_cap;

	}



	if (!pos)

		return -ENOTSUPP;

drivers/pci/pci.h

+9 −0
Original line number Diff line number Diff line
@@ -711,6 +711,9 @@ void pci_iov_update_resource(struct pci_dev *dev, int resno); 
resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno);

void pci_restore_iov_state(struct pci_dev *dev);

int pci_iov_bus_range(struct pci_bus *bus);

void pci_iov_resource_set_size(struct pci_dev *dev, int resno,

			       resource_size_t size);

bool pci_iov_is_memory_decoding_enabled(struct pci_dev *dev);

static inline u16 pci_iov_vf_rebar_cap(struct pci_dev *dev)

{

	if (!dev->is_physfn)
@@ -750,6 +753,12 @@ static inline int pci_iov_bus_range(struct pci_bus *bus) 
{

	return 0;

}

static inline void pci_iov_resource_set_size(struct pci_dev *dev, int resno,

					     resource_size_t size) { }

static inline bool pci_iov_is_memory_decoding_enabled(struct pci_dev *dev)

{

	return false;

}

static inline u16 pci_iov_vf_rebar_cap(struct pci_dev *dev)

{

	return 0;

drivers/pci/setup-res.c

+30 −5
Original line number Diff line number Diff line
@@ -423,13 +423,39 @@ void pci_release_resource(struct pci_dev *dev, int resno) 
}

EXPORT_SYMBOL(pci_release_resource);



static bool pci_resize_is_memory_decoding_enabled(struct pci_dev *dev,

						  int resno)

{

	u16 cmd;



	if (pci_resource_is_iov(resno))

		return pci_iov_is_memory_decoding_enabled(dev);



	pci_read_config_word(dev, PCI_COMMAND, &cmd);



	return cmd & PCI_COMMAND_MEMORY;

}



static void pci_resize_resource_set_size(struct pci_dev *dev, int resno,

					 int size)

{

	resource_size_t res_size = pci_rebar_size_to_bytes(size);

	struct resource *res = pci_resource_n(dev, resno);



	if (!pci_resource_is_iov(resno)) {

		resource_set_size(res, res_size);

	} else {

		resource_set_size(res, res_size * pci_sriov_get_totalvfs(dev));

		pci_iov_resource_set_size(dev, resno, res_size);

	}

}



int pci_resize_resource(struct pci_dev *dev, int resno, int size)

{

	struct resource *res = pci_resource_n(dev, resno);

	struct pci_host_bridge *host;

	int old, ret;

	u32 sizes;

	u16 cmd;



	/* Check if we must preserve the firmware's resource assignment */

	host = pci_find_host_bridge(dev->bus);
@@ -440,8 +466,7 @@ int pci_resize_resource(struct pci_dev *dev, int resno, int size) 
	if (!(res->flags & IORESOURCE_UNSET))

		return -EBUSY;



	pci_read_config_word(dev, PCI_COMMAND, &cmd);

	if (cmd & PCI_COMMAND_MEMORY)

	if (pci_resize_is_memory_decoding_enabled(dev, resno))

		return -EBUSY;



	sizes = pci_rebar_get_possible_sizes(dev, resno);
@@ -459,7 +484,7 @@ int pci_resize_resource(struct pci_dev *dev, int resno, int size) 
	if (ret)

		return ret;



	resource_set_size(res, pci_rebar_size_to_bytes(size));

	pci_resize_resource_set_size(dev, resno, size);



	/* Check if the new config works by trying to assign everything. */

	if (dev->bus->self) {
@@ -471,7 +496,7 @@ int pci_resize_resource(struct pci_dev *dev, int resno, int size) 


error_resize:

	pci_rebar_set_size(dev, resno, old);

	resource_set_size(res, pci_rebar_size_to_bytes(old));

	pci_resize_resource_set_size(dev, resno, old);

	return ret;

}

EXPORT_SYMBOL(pci_resize_resource);