Commit e2ee2e9b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull KVM/arm64 updates from Will Deacon:
 "New features:

   - Support for non-protected guest in protected mode, achieving near
     feature parity with the non-protected mode

   - Support for the EL2 timers as part of the ongoing NV support

   - Allow control of hardware tracing for nVHE/hVHE

  Improvements, fixes and cleanups:

   - Massive cleanup of the debug infrastructure, making it a bit less
     awkward and definitely easier to maintain. This should pave the way
     for further optimisations

   - Complete rewrite of pKVM's fixed-feature infrastructure, aligning
     it with the rest of KVM and making the code easier to follow

   - Large simplification of pKVM's memory protection infrastructure

   - Better handling of RES0/RES1 fields for memory-backed system
     registers

   - Add a workaround for Qualcomm's Snapdragon X CPUs, which suffer
     from a pretty nasty timer bug

   - Small collection of cleanups and low-impact fixes"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (87 commits)
  arm64/sysreg: Get rid of TRFCR_ELx SysregFields
  KVM: arm64: nv: Fix doc header layout for timers
  KVM: arm64: nv: Apply RESx settings to sysreg reset values
  KVM: arm64: nv: Always evaluate HCR_EL2 using sanitising accessors
  KVM: arm64: Fix selftests after sysreg field name update
  coresight: Pass guest TRFCR value to KVM
  KVM: arm64: Support trace filtering for guests
  KVM: arm64: coresight: Give TRBE enabled state to KVM
  coresight: trbe: Remove redundant disable call
  arm64/sysreg/tools: Move TRFCR definitions to sysreg
  tools: arm64: Update sysreg.h header files
  KVM: arm64: Drop pkvm_mem_transition for host/hyp donations
  KVM: arm64: Drop pkvm_mem_transition for host/hyp sharing
  KVM: arm64: Drop pkvm_mem_transition for FF-A
  KVM: arm64: Explicitly handle BRBE traps as UNDEFINED
  KVM: arm64: vgic: Use str_enabled_disabled() in vgic_v3_probe()
  arm64: kvm: Introduce nvhe stack size constants
  KVM: arm64: Fix nVHE stacktrace VA bits mask
  KVM: arm64: Fix FEAT_MTE in pKVM
  Documentation: Update the behaviour of "kvm-arm.mode"
  ...
parents 9ff28f2f 01009b06

Documentation/admin-guide/kernel-parameters.txt

+10 −6
Original line number Diff line number Diff line
@@ -2824,17 +2824,21 @@ 
			nvhe: Standard nVHE-based mode, without support for

			      protected guests.



			protected: nVHE-based mode with support for guests whose

				   state is kept private from the host.

			protected: Mode with support for guests whose state is

				   kept private from the host, using VHE or

				   nVHE depending on HW support.



			nested: VHE-based mode with support for nested

				virtualization. Requires at least ARMv8.3

				hardware.

				virtualization. Requires at least ARMv8.4

				hardware (with FEAT_NV2).



			Defaults to VHE/nVHE based on hardware support. Setting

			mode to "protected" will disable kexec and hibernation

			for the host. "nested" is experimental and should be

			used with extreme caution.

			for the host. To force nVHE on VHE hardware, add

			"arm64_sw.hvhe=0 id_aa64mmfr1.vh=0" to the

			command-line.

			"nested" is experimental and should be used with

			extreme caution.



	kvm-arm.vgic_v3_group0_trap=

			[KVM,ARM,EARLY] Trap guest accesses to GICv3 group-0

Documentation/virt/kvm/devices/vcpu.rst

+8 −6
Original line number Diff line number Diff line
@@ -142,8 +142,8 @@ the cpu field to the processor id. 


:Architectures: ARM64



2.1. ATTRIBUTES: KVM_ARM_VCPU_TIMER_IRQ_VTIMER, KVM_ARM_VCPU_TIMER_IRQ_PTIMER

-----------------------------------------------------------------------------

2.1. ATTRIBUTES: KVM_ARM_VCPU_TIMER_IRQ_{VTIMER,PTIMER,HVTIMER,HPTIMER}

-----------------------------------------------------------------------



:Parameters: in kvm_device_attr.addr the address for the timer interrupt is a

	     pointer to an int
@@ -159,10 +159,12 @@ A value describing the architected timer interrupt number when connected to an 
in-kernel virtual GIC.  These must be a PPI (16 <= intid < 32).  Setting the

attribute overrides the default values (see below).



=============================  ==========================================

==============================  ==========================================

KVM_ARM_VCPU_TIMER_IRQ_VTIMER   The EL1 virtual timer intid (default: 27)

KVM_ARM_VCPU_TIMER_IRQ_PTIMER   The EL1 physical timer intid (default: 30)

=============================  ==========================================

KVM_ARM_VCPU_TIMER_IRQ_HVTIMER  The EL2 virtual timer intid (default: 28)

KVM_ARM_VCPU_TIMER_IRQ_HPTIMER  The EL2 physical timer intid (default: 26)

==============================  ==========================================



Setting the same PPI for different timers will prevent the VCPUs from running.

Setting the interrupt number on a VCPU configures all VCPUs created at that

arch/arm64/include/asm/cputype.h

+2 −0
Original line number Diff line number Diff line
@@ -122,6 +122,7 @@ 
#define QCOM_CPU_PART_KRYO_3XX_SILVER	0x803

#define QCOM_CPU_PART_KRYO_4XX_GOLD	0x804

#define QCOM_CPU_PART_KRYO_4XX_SILVER	0x805

#define QCOM_CPU_PART_ORYON_X1		0x001



#define NVIDIA_CPU_PART_DENVER		0x003

#define NVIDIA_CPU_PART_CARMEL		0x004
@@ -198,6 +199,7 @@ 
#define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER)

#define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD)

#define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER)

#define MIDR_QCOM_ORYON_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_ORYON_X1)

#define MIDR_NVIDIA_DENVER MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_DENVER)

#define MIDR_NVIDIA_CARMEL MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_CARMEL)

#define MIDR_FUJITSU_A64FX MIDR_CPU_MODEL(ARM_CPU_IMP_FUJITSU, FUJITSU_CPU_PART_A64FX)

arch/arm64/include/asm/kvm_arm.h

+1 −1
Original line number Diff line number Diff line
@@ -300,7 +300,7 @@ 
#define CPTR_EL2_TSM	(1 << 12)

#define CPTR_EL2_TFP	(1 << CPTR_EL2_TFP_SHIFT)

#define CPTR_EL2_TZ	(1 << 8)

#define CPTR_NVHE_EL2_RES1	0x000032ff /* known RES1 bits in CPTR_EL2 (nVHE) */

#define CPTR_NVHE_EL2_RES1	(BIT(13) | BIT(9) | GENMASK(7, 0))

#define CPTR_NVHE_EL2_RES0	(GENMASK(63, 32) |	\

				 GENMASK(29, 21) |	\

				 GENMASK(19, 14) |	\

arch/arm64/include/asm/kvm_asm.h

+10 −4
Original line number Diff line number Diff line
@@ -53,8 +53,7 @@ 
enum __kvm_host_smccc_func {

	/* Hypercalls available only prior to pKVM finalisation */

	/* __KVM_HOST_SMCCC_FUNC___kvm_hyp_init */

	__KVM_HOST_SMCCC_FUNC___kvm_get_mdcr_el2 = __KVM_HOST_SMCCC_FUNC___kvm_hyp_init + 1,

	__KVM_HOST_SMCCC_FUNC___pkvm_init,

	__KVM_HOST_SMCCC_FUNC___pkvm_init = __KVM_HOST_SMCCC_FUNC___kvm_hyp_init + 1,

	__KVM_HOST_SMCCC_FUNC___pkvm_create_private_mapping,

	__KVM_HOST_SMCCC_FUNC___pkvm_cpu_set_vector,

	__KVM_HOST_SMCCC_FUNC___kvm_enable_ssbs,
@@ -65,6 +64,12 @@ enum __kvm_host_smccc_func { 
	/* Hypercalls available after pKVM finalisation */

	__KVM_HOST_SMCCC_FUNC___pkvm_host_share_hyp,

	__KVM_HOST_SMCCC_FUNC___pkvm_host_unshare_hyp,

	__KVM_HOST_SMCCC_FUNC___pkvm_host_share_guest,

	__KVM_HOST_SMCCC_FUNC___pkvm_host_unshare_guest,

	__KVM_HOST_SMCCC_FUNC___pkvm_host_relax_perms_guest,

	__KVM_HOST_SMCCC_FUNC___pkvm_host_wrprotect_guest,

	__KVM_HOST_SMCCC_FUNC___pkvm_host_test_clear_young_guest,

	__KVM_HOST_SMCCC_FUNC___pkvm_host_mkyoung_guest,

	__KVM_HOST_SMCCC_FUNC___kvm_adjust_pc,

	__KVM_HOST_SMCCC_FUNC___kvm_vcpu_run,

	__KVM_HOST_SMCCC_FUNC___kvm_flush_vm_context,
@@ -79,6 +84,9 @@ enum __kvm_host_smccc_func { 
	__KVM_HOST_SMCCC_FUNC___pkvm_init_vm,

	__KVM_HOST_SMCCC_FUNC___pkvm_init_vcpu,

	__KVM_HOST_SMCCC_FUNC___pkvm_teardown_vm,

	__KVM_HOST_SMCCC_FUNC___pkvm_vcpu_load,

	__KVM_HOST_SMCCC_FUNC___pkvm_vcpu_put,

	__KVM_HOST_SMCCC_FUNC___pkvm_tlb_flush_vmid,

};



#define DECLARE_KVM_VHE_SYM(sym)	extern char sym[]
@@ -247,8 +255,6 @@ extern void __kvm_adjust_pc(struct kvm_vcpu *vcpu); 
extern u64 __vgic_v3_get_gic_config(void);

extern void __vgic_v3_init_lrs(void);



extern u64 __kvm_get_mdcr_el2(void);



#define __KVM_EXTABLE(from, to)						\

	"	.pushsection	__kvm_ex_table, \"a\"\n"		\

	"	.align		3\n"					\