Commit e39e72cf authored by YT Lee's avatar YT Lee Committed by Matthias Brugger
Browse files

arm64: dts: mt8195: Add cpufreq node 



Add cpufreq node for mt8195.

Signed-off-by: default avatarYT Lee <yt.lee@mediatek.corp-partner.google.com>
Signed-off-by: default avatarTinghan Shen <tinghan.shen@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220811025813.21492-11-tinghan.shen@mediatek.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent a93f071a

arch/arm64/boot/dts/mediatek/mt8195.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ cpu0: cpu@0 { 
			compatible = "arm,cortex-a55";

			reg = <0x000>;

			enable-method = "psci";

			performance-domains = <&performance 0>;

			clock-frequency = <1701000000>;

			capacity-dmips-mhz = <578>;

			cpu-idle-states = <&cpu_off_l &cluster_off_l>;
@@ -38,6 +39,7 @@ cpu1: cpu@100 { 
			compatible = "arm,cortex-a55";

			reg = <0x100>;

			enable-method = "psci";

			performance-domains = <&performance 0>;

			clock-frequency = <1701000000>;

			capacity-dmips-mhz = <578>;

			cpu-idle-states = <&cpu_off_l &cluster_off_l>;
@@ -50,6 +52,7 @@ cpu2: cpu@200 { 
			compatible = "arm,cortex-a55";

			reg = <0x200>;

			enable-method = "psci";

			performance-domains = <&performance 0>;

			clock-frequency = <1701000000>;

			capacity-dmips-mhz = <578>;

			cpu-idle-states = <&cpu_off_l &cluster_off_l>;
@@ -62,6 +65,7 @@ cpu3: cpu@300 { 
			compatible = "arm,cortex-a55";

			reg = <0x300>;

			enable-method = "psci";

			performance-domains = <&performance 0>;

			clock-frequency = <1701000000>;

			capacity-dmips-mhz = <578>;

			cpu-idle-states = <&cpu_off_l &cluster_off_l>;
@@ -74,6 +78,7 @@ cpu4: cpu@400 { 
			compatible = "arm,cortex-a78";

			reg = <0x400>;

			enable-method = "psci";

			performance-domains = <&performance 1>;

			clock-frequency = <2171000000>;

			capacity-dmips-mhz = <1024>;

			cpu-idle-states = <&cpu_off_b &cluster_off_b>;
@@ -86,6 +91,7 @@ cpu5: cpu@500 { 
			compatible = "arm,cortex-a78";

			reg = <0x500>;

			enable-method = "psci";

			performance-domains = <&performance 1>;

			clock-frequency = <2171000000>;

			capacity-dmips-mhz = <1024>;

			cpu-idle-states = <&cpu_off_b &cluster_off_b>;
@@ -98,6 +104,7 @@ cpu6: cpu@600 { 
			compatible = "arm,cortex-a78";

			reg = <0x600>;

			enable-method = "psci";

			performance-domains = <&performance 1>;

			clock-frequency = <2171000000>;

			capacity-dmips-mhz = <1024>;

			cpu-idle-states = <&cpu_off_b &cluster_off_b>;
@@ -110,6 +117,7 @@ cpu7: cpu@700 { 
			compatible = "arm,cortex-a78";

			reg = <0x700>;

			enable-method = "psci";

			performance-domains = <&performance 1>;

			clock-frequency = <2171000000>;

			capacity-dmips-mhz = <1024>;

			cpu-idle-states = <&cpu_off_b &cluster_off_b>;
@@ -231,6 +239,12 @@ clk32k: oscillator-32k { 
		clock-output-names = "clk32k";

	};



	performance: performance-controller@11bc10 {

		compatible = "mediatek,cpufreq-hw";

		reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;

		#performance-domain-cells = <1>;

	};



	pmu-a55 {

		compatible = "arm,cortex-a55-pmu";

		interrupt-parent = <&gic>;