Commit e3b96f5b authored by Asad Kamal's avatar Asad Kamal Committed by Alex Deucher
Browse files

drm/amd/pm: Add gpuboard temperature metrics support 



Add gpuboard temperature metrics support via system metrics table for
smu_v15_0_8

v3: Use per sensor attr id (Lijo)

v4: Use s16 for temp, remove cast, use separate function to fill
gpuboard temperature metrics data (Lijo)

Signed-off-by: default avatarAsad Kamal <asad.kamal@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1415503d

drivers/gpu/drm/amd/include/kgd_pp_interface.h

+35 −0
Original line number Diff line number Diff line
@@ -590,6 +590,35 @@ enum amdgpu_metrics_attr_id { 
	AMDGPU_METRICS_ATTR_ID_TEMPERATURE_MID,

	AMDGPU_METRICS_ATTR_ID_TEMPERATURE_AID,

	AMDGPU_METRICS_ATTR_ID_TEMPERATURE_XCD,

	AMDGPU_METRICS_ATTR_ID_LABEL_VERSION,

	AMDGPU_METRICS_ATTR_ID_NODE_ID,

	AMDGPU_METRICS_ATTR_ID_NODE_TEMP_RETIMER,

	AMDGPU_METRICS_ATTR_ID_NODE_TEMP_IBC,

	AMDGPU_METRICS_ATTR_ID_NODE_TEMP_IBC_2,

	AMDGPU_METRICS_ATTR_ID_NODE_TEMP_VDD18_VR,

	AMDGPU_METRICS_ATTR_ID_NODE_TEMP_04_HBM_B_VR,

	AMDGPU_METRICS_ATTR_ID_NODE_TEMP_04_HBM_D_VR,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDCR_SOCIO_A,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDCR_SOCIO_C,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDCR_X0,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDCR_X1,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDIO_HBM_B,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDIO_HBM_D,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDIO_04_HBM_B,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDIO_04_HBM_D,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDCR_HBM_B,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDCR_HBM_D,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDCR_075_HBM_B,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDCR_075_HBM_D,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDIO_11_GTA_A,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDIO_11_GTA_C,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDAN_075_GTA_A,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDAN_075_GTA_C,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDCR_075_UCIE,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDIO_065_UCIEAA,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDIO_065_UCIEAM_A,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDIO_065_UCIEAM_C,

	AMDGPU_METRICS_ATTR_ID_VR_TEMP_VDDAN_075,

	AMDGPU_METRICS_ATTR_ID_MAX,

};
@@ -1842,4 +1871,10 @@ enum amdgpu_xgmi_link_status { 
	AMDGPU_XGMI_LINK_NA = 2,

};



struct amdgpu_gpuboard_temp_metrics_v1_1 {

	struct metrics_table_header common_header;

	int attr_count;

	struct gpu_metrics_attr metrics_attrs[];

};



#endif

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c

+172 −0
Original line number Diff line number Diff line
@@ -171,8 +171,14 @@ static const struct cmn2asic_mapping smu_v15_0_8_table_map[SMU_TABLE_COUNT] = { 
	TAB_MAP(I2C_COMMANDS),

};



static size_t smu_v15_0_8_get_system_metrics_size(void)

{

	return sizeof(SystemMetricsTable_t);

}



static int smu_v15_0_8_tables_init(struct smu_context *smu)

{

	struct smu_v15_0_8_gpuboard_temp_metrics *gpuboard_temp_metrics;

	struct smu_table_context *smu_table = &smu->smu_table;

	int ret, gpu_metrcs_size = sizeof(MetricsTable_t);

	struct smu_table *tables = smu_table->tables;
@@ -187,6 +193,9 @@ static int smu_v15_0_8_tables_init(struct smu_context *smu) 
		       gpu_metrcs_size,

		       PAGE_SIZE,

		       AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT);

	SMU_TABLE_INIT(tables, SMU_TABLE_PMFW_SYSTEM_METRICS,

		       smu_v15_0_8_get_system_metrics_size(), PAGE_SIZE,

		       AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT);



	metrics_table = kzalloc(gpu_metrcs_size, GFP_KERNEL);

	if (!metrics_table)
@@ -207,6 +216,25 @@ static int smu_v15_0_8_tables_init(struct smu_context *smu) 
	gpu_metrics = (struct smu_v15_0_8_gpu_metrics *)smu_driver_table_ptr(smu,

		       SMU_DRIVER_TABLE_GPU_METRICS);

	smu_v15_0_8_gpu_metrics_init(gpu_metrics, 1, 9);



	ret = smu_table_cache_init(smu, SMU_TABLE_PMFW_SYSTEM_METRICS,

				   smu_v15_0_8_get_system_metrics_size(), 5);



	if (ret)

		return ret;



	/* Initialize GPU board temperature metrics */

	ret = smu_driver_table_init(smu, SMU_DRIVER_TABLE_GPUBOARD_TEMP_METRICS,

				    sizeof(*gpuboard_temp_metrics), 50);

	if (ret) {

		smu_table_cache_fini(smu, SMU_TABLE_PMFW_SYSTEM_METRICS);

		return ret;

	}

	gpuboard_temp_metrics = (struct smu_v15_0_8_gpuboard_temp_metrics *)

		smu_driver_table_ptr(smu,

				     SMU_DRIVER_TABLE_GPUBOARD_TEMP_METRICS);

	smu_v15_0_8_gpuboard_temp_metrics_init(gpuboard_temp_metrics, 1, 1);



	smu_table->metrics_table = no_free_ptr(metrics_table);

	smu_table->driver_pptable = no_free_ptr(driver_pptable);
@@ -252,6 +280,8 @@ static int smu_v15_0_8_tables_fini(struct smu_context *smu) 
{

	struct smu_table_context *smu_table = &smu->smu_table;



	smu_driver_table_fini(smu, SMU_DRIVER_TABLE_GPUBOARD_TEMP_METRICS);

	smu_table_cache_fini(smu, SMU_TABLE_PMFW_SYSTEM_METRICS);

	mutex_destroy(&smu_table->metrics_lock);



	return 0;
@@ -487,6 +517,33 @@ static int smu_v15_0_8_thermal_get_temperature(struct smu_context *smu, 
	return ret;

}



static int smu_v15_0_8_get_system_metrics_table(struct smu_context *smu)

{

	struct smu_table_context *smu_table = &smu->smu_table;

	struct smu_table *table = &smu_table->driver_table;

	struct smu_table *tables = smu_table->tables;

	struct smu_table *sys_table;

	int ret;



	sys_table = &tables[SMU_TABLE_PMFW_SYSTEM_METRICS];

	if (smu_table_cache_is_valid(sys_table))

		return 0;



	ret = smu_cmn_send_smc_msg(smu, SMU_MSG_GetSystemMetricsTable, NULL);

	if (ret) {

		dev_info(smu->adev->dev,

			 "Failed to export system metrics table!\n");

		return ret;

	}



	amdgpu_hdp_invalidate(smu->adev, NULL);

	smu_table_cache_update_time(sys_table, jiffies);

	memcpy(sys_table->cache.buffer, table->cpu_addr,

	       sizeof(SystemMetricsTable_t));



	return 0;

}



static int smu_v15_0_8_read_sensor(struct smu_context *smu,

				   enum amd_pp_sensors sensor, void *data,

				   uint32_t *size)
@@ -1292,6 +1349,115 @@ static int smu_v15_0_8_mode2_reset(struct smu_context *smu) 
	return ret;

}



static bool smu_v15_0_8_is_temp_metrics_supported(struct smu_context *smu,

						  enum smu_temp_metric_type type)

{

	switch (type) {

	case SMU_TEMP_METRIC_GPUBOARD:

		return true;

	default:

		return false;

	}

}



static void smu_v15_0_8_fill_gpuboard_temp_metrics(

	struct smu_v15_0_8_gpuboard_temp_metrics *gpuboard_temp_metrics,

	const SystemMetricsTable_t *metrics)

{

	gpuboard_temp_metrics->accumulation_counter = metrics->AccumulationCounter;

	gpuboard_temp_metrics->label_version = metrics->LabelVersion;

	gpuboard_temp_metrics->node_id = metrics->NodeIdentifier;



	gpuboard_temp_metrics->node_temp_retimer =

		metrics->NodeTemperatures[NODE_TEMP_RETIMER];

	gpuboard_temp_metrics->node_temp_ibc =

		metrics->NodeTemperatures[NODE_TEMP_IBC_TEMP];

	gpuboard_temp_metrics->node_temp_ibc_2 =

		metrics->NodeTemperatures[NODE_TEMP_IBC_2_TEMP];

	gpuboard_temp_metrics->node_temp_vdd18_vr =

		metrics->NodeTemperatures[NODE_TEMP_VDD18_VR_TEMP];

	gpuboard_temp_metrics->node_temp_04_hbm_b_vr =

		metrics->NodeTemperatures[NODE_TEMP_04_HBM_B_VR_TEMP];

	gpuboard_temp_metrics->node_temp_04_hbm_d_vr =

		metrics->NodeTemperatures[NODE_TEMP_04_HBM_D_VR_TEMP];



	gpuboard_temp_metrics->vr_temp_vddcr_socio_a =

		metrics->VrTemperatures[SVI_PLANE_VDDCR_SOCIO_A_TEMP];

	gpuboard_temp_metrics->vr_temp_vddcr_socio_c =

		metrics->VrTemperatures[SVI_PLANE_VDDCR_SOCIO_C_TEMP];

	gpuboard_temp_metrics->vr_temp_vddcr_x0 =

		metrics->VrTemperatures[SVI_PLANE_VDDCR_X0_TEMP];

	gpuboard_temp_metrics->vr_temp_vddcr_x1 =

		metrics->VrTemperatures[SVI_PLANE_VDDCR_X1_TEMP];

	gpuboard_temp_metrics->vr_temp_vddio_hbm_b =

		metrics->VrTemperatures[SVI_PLANE_VDDIO_HBM_B_TEMP];

	gpuboard_temp_metrics->vr_temp_vddio_hbm_d =

		metrics->VrTemperatures[SVI_PLANE_VDDIO_HBM_D_TEMP];

	gpuboard_temp_metrics->vr_temp_vddio_04_hbm_b =

		metrics->VrTemperatures[SVI_PLANE_VDDIO_04_HBM_B_TEMP];

	gpuboard_temp_metrics->vr_temp_vddio_04_hbm_d =

		metrics->VrTemperatures[SVI_PLANE_VDDIO_04_HBM_D_TEMP];

	gpuboard_temp_metrics->vr_temp_vddcr_hbm_b =

		metrics->VrTemperatures[SVI_PLANE_VDDCR_HBM_B_TEMP];

	gpuboard_temp_metrics->vr_temp_vddcr_hbm_d =

		metrics->VrTemperatures[SVI_PLANE_VDDCR_HBM_D_TEMP];

	gpuboard_temp_metrics->vr_temp_vddcr_075_hbm_b =

		metrics->VrTemperatures[SVI_PLANE_VDDCR_075_HBM_B_TEMP];

	gpuboard_temp_metrics->vr_temp_vddcr_075_hbm_d =

		metrics->VrTemperatures[SVI_PLANE_VDDCR_075_HBM_D_TEMP];

	gpuboard_temp_metrics->vr_temp_vddio_11_gta_a =

		metrics->VrTemperatures[SVI_PLANE_VDDIO_11_GTA_A_TEMP];

	gpuboard_temp_metrics->vr_temp_vddio_11_gta_c =

		metrics->VrTemperatures[SVI_PLANE_VDDIO_11_GTA_C_TEMP];

	gpuboard_temp_metrics->vr_temp_vddan_075_gta_a =

		metrics->VrTemperatures[SVI_PLANE_VDDAN_075_GTA_A_TEMP];

	gpuboard_temp_metrics->vr_temp_vddan_075_gta_c =

		metrics->VrTemperatures[SVI_PLANE_VDDAN_075_GTA_C_TEMP];

	gpuboard_temp_metrics->vr_temp_vddcr_075_ucie =

		metrics->VrTemperatures[SVI_PLANE_VDDCR_075_UCIE_TEMP];

	gpuboard_temp_metrics->vr_temp_vddio_065_ucieaa =

		metrics->VrTemperatures[SVI_PLANE_VDDIO_065_UCIEAA_TEMP];

	gpuboard_temp_metrics->vr_temp_vddio_065_ucieam_a =

		metrics->VrTemperatures[SVI_PLANE_VDDIO_065_UCIEAM_A_TEMP];

	gpuboard_temp_metrics->vr_temp_vddio_065_ucieam_c =

		metrics->VrTemperatures[SVI_PLANE_VDDIO_065_UCIEAM_C_TEMP];

	gpuboard_temp_metrics->vr_temp_vddan_075 =

		metrics->VrTemperatures[SVI_PLANE_VDDAN_075_TEMP];

}



static ssize_t smu_v15_0_8_get_temp_metrics(struct smu_context *smu,

					    enum smu_temp_metric_type type,

					    void *table)

{

	struct smu_v15_0_8_gpuboard_temp_metrics *gpuboard_temp_metrics;

	struct smu_table_context *smu_table = &smu->smu_table;

	struct smu_table *tables = smu_table->tables;

	enum smu_driver_table_id table_id;

	SystemMetricsTable_t *metrics;

	struct smu_table *sys_table;

	ssize_t size;

	int ret;



	table_id = SMU_DRIVER_TABLE_GPUBOARD_TEMP_METRICS;

	gpuboard_temp_metrics =

		(struct smu_v15_0_8_gpuboard_temp_metrics *)

		smu_driver_table_ptr(smu, table_id);

	size = sizeof(*gpuboard_temp_metrics);



	ret = smu_v15_0_8_get_system_metrics_table(smu);

	if (ret)

		return ret;



	sys_table = &tables[SMU_TABLE_PMFW_SYSTEM_METRICS];

	metrics = (SystemMetricsTable_t *)sys_table->cache.buffer;

	smu_driver_table_update_cache_time(smu, table_id);



	smu_v15_0_8_fill_gpuboard_temp_metrics(gpuboard_temp_metrics,

						      metrics);

	memcpy(table, gpuboard_temp_metrics, size);

	return size;

}



static ssize_t smu_v15_0_8_get_gpu_metrics(struct smu_context *smu, void **table)

{

	struct smu_table_context *smu_table = &smu->smu_table;
@@ -1954,6 +2120,11 @@ static void smu_v15_0_8_init_msg_ctl(struct smu_context *smu, 
	ctl->message_map = message_map;

}



static const struct smu_temp_funcs smu_v15_0_8_temp_funcs = {

	.temp_metrics_is_supported = smu_v15_0_8_is_temp_metrics_supported,

	.get_temp_metrics = smu_v15_0_8_get_temp_metrics,

};



void smu_v15_0_8_set_ppt_funcs(struct smu_context *smu)

{

	smu->ppt_funcs = &smu_v15_0_8_ppt_funcs;
@@ -1961,5 +2132,6 @@ void smu_v15_0_8_set_ppt_funcs(struct smu_context *smu) 
	smu->feature_map = smu_v15_0_8_feature_mask_map;

	smu->table_map = smu_v15_0_8_table_map;

	smu_v15_0_8_init_msg_ctl(smu, smu_v15_0_8_message_map);

	smu->smu_temp.temp_funcs = &smu_v15_0_8_temp_funcs;

	smu->smc_driver_if_version = SMU15_DRIVER_IF_VERSION_SMU_V15_0_8;

}

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.h

+71 −0
Original line number Diff line number Diff line
@@ -180,5 +180,76 @@ typedef struct { 
		  SMU_15_0_8_MAX_XCC);



DECLARE_SMU_METRICS_CLASS(smu_v15_0_8_gpu_metrics, SMU_15_0_8_METRICS_FIELDS);



/* Maximum temperature sensor counts for system metrics */

#define SMU_15_0_8_MAX_NODE_TEMP_ENTRIES	12

#define SMU_15_0_8_MAX_VR_TEMP_ENTRIES		22



/* SMUv 15.0.8 GPU board temperature metrics */

#define SMU_15_0_8_GPUBOARD_TEMP_METRICS_FIELDS(SMU_SCALAR, SMU_ARRAY)         \

	SMU_SCALAR(SMU_MATTR(ACCUMULATION_COUNTER), SMU_MUNIT(NONE),           \

		   SMU_MTYPE(U64), accumulation_counter);                      \

	SMU_SCALAR(SMU_MATTR(LABEL_VERSION), SMU_MUNIT(NONE),                  \

		   SMU_MTYPE(U16), label_version);                             \

	SMU_SCALAR(SMU_MATTR(NODE_ID), SMU_MUNIT(NONE),                        \

		   SMU_MTYPE(U16), node_id);                                   \

	SMU_SCALAR(SMU_MATTR(NODE_TEMP_RETIMER), SMU_MUNIT(TEMP_1),            \

		   SMU_MTYPE(S16), node_temp_retimer);                         \

	SMU_SCALAR(SMU_MATTR(NODE_TEMP_IBC), SMU_MUNIT(TEMP_1),                \

		   SMU_MTYPE(S16), node_temp_ibc);                             \

	SMU_SCALAR(SMU_MATTR(NODE_TEMP_IBC_2), SMU_MUNIT(TEMP_1),              \

		   SMU_MTYPE(S16), node_temp_ibc_2);                           \

	SMU_SCALAR(SMU_MATTR(NODE_TEMP_VDD18_VR), SMU_MUNIT(TEMP_1),           \

		   SMU_MTYPE(S16), node_temp_vdd18_vr);                        \

	SMU_SCALAR(SMU_MATTR(NODE_TEMP_04_HBM_B_VR), SMU_MUNIT(TEMP_1),        \

		   SMU_MTYPE(S16), node_temp_04_hbm_b_vr);                     \

	SMU_SCALAR(SMU_MATTR(NODE_TEMP_04_HBM_D_VR), SMU_MUNIT(TEMP_1),        \

		   SMU_MTYPE(S16), node_temp_04_hbm_d_vr);                     \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDCR_SOCIO_A), SMU_MUNIT(TEMP_1),        \

		   SMU_MTYPE(S16), vr_temp_vddcr_socio_a);                     \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDCR_SOCIO_C), SMU_MUNIT(TEMP_1),        \

		   SMU_MTYPE(S16), vr_temp_vddcr_socio_c);                     \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDCR_X0), SMU_MUNIT(TEMP_1),             \

		   SMU_MTYPE(S16), vr_temp_vddcr_x0);                          \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDCR_X1), SMU_MUNIT(TEMP_1),             \

		   SMU_MTYPE(S16), vr_temp_vddcr_x1);                          \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDIO_HBM_B), SMU_MUNIT(TEMP_1),          \

		   SMU_MTYPE(S16), vr_temp_vddio_hbm_b);                       \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDIO_HBM_D), SMU_MUNIT(TEMP_1),          \

		   SMU_MTYPE(S16), vr_temp_vddio_hbm_d);                       \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDIO_04_HBM_B), SMU_MUNIT(TEMP_1),       \

		   SMU_MTYPE(S16), vr_temp_vddio_04_hbm_b);                    \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDIO_04_HBM_D), SMU_MUNIT(TEMP_1),       \

		   SMU_MTYPE(S16), vr_temp_vddio_04_hbm_d);                    \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDCR_HBM_B), SMU_MUNIT(TEMP_1),          \

		   SMU_MTYPE(S16), vr_temp_vddcr_hbm_b);                       \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDCR_HBM_D), SMU_MUNIT(TEMP_1),          \

		   SMU_MTYPE(S16), vr_temp_vddcr_hbm_d);                       \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDCR_075_HBM_B), SMU_MUNIT(TEMP_1),      \

		   SMU_MTYPE(S16), vr_temp_vddcr_075_hbm_b);                   \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDCR_075_HBM_D), SMU_MUNIT(TEMP_1),      \

		   SMU_MTYPE(S16), vr_temp_vddcr_075_hbm_d);                   \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDIO_11_GTA_A), SMU_MUNIT(TEMP_1),       \

		   SMU_MTYPE(S16), vr_temp_vddio_11_gta_a);                    \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDIO_11_GTA_C), SMU_MUNIT(TEMP_1),       \

		   SMU_MTYPE(S16), vr_temp_vddio_11_gta_c);                    \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDAN_075_GTA_A), SMU_MUNIT(TEMP_1),      \

		   SMU_MTYPE(S16), vr_temp_vddan_075_gta_a);                   \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDAN_075_GTA_C), SMU_MUNIT(TEMP_1),      \

		   SMU_MTYPE(S16), vr_temp_vddan_075_gta_c);                   \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDCR_075_UCIE), SMU_MUNIT(TEMP_1),       \

		   SMU_MTYPE(S16), vr_temp_vddcr_075_ucie);                    \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDIO_065_UCIEAA), SMU_MUNIT(TEMP_1),     \

		   SMU_MTYPE(S16), vr_temp_vddio_065_ucieaa);                  \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDIO_065_UCIEAM_A), SMU_MUNIT(TEMP_1),   \

		   SMU_MTYPE(S16), vr_temp_vddio_065_ucieam_a);                \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDIO_065_UCIEAM_C), SMU_MUNIT(TEMP_1),   \

		   SMU_MTYPE(S16), vr_temp_vddio_065_ucieam_c);                \

	SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDAN_075), SMU_MUNIT(TEMP_1),            \

		   SMU_MTYPE(S16), vr_temp_vddan_075);



DECLARE_SMU_METRICS_CLASS(smu_v15_0_8_gpuboard_temp_metrics,

			  SMU_15_0_8_GPUBOARD_TEMP_METRICS_FIELDS);



#endif

#endif