Commit e3baa5d4 authored by Jinqian Yang's avatar Jinqian Yang Committed by Will Deacon
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arm64: Add support for TSV110 Spectre-BHB mitigation 



The TSV110 processor is vulnerable to the Spectre-BHB (Branch History
Buffer) attack, which can be exploited to leak information through
branch prediction side channels. This commit adds the MIDR of TSV110
to the list for software mitigation.

Signed-off-by: default avatarJinqian Yang <yangjinqian1@huawei.com>
Reviewed-by: default avatarZenghui Yu <zenghui.yu@linux.dev>
Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 8f0b4cce

arch/arm64/kernel/proton-pack.c

+1 −0
Original line number Diff line number Diff line
@@ -887,6 +887,7 @@ static u8 spectre_bhb_loop_affected(void) 
		MIDR_ALL_VERSIONS(MIDR_CORTEX_X2),

		MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),

		MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),

		MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),

		{},

	};

	static const struct midr_range spectre_bhb_k24_list[] = {