Commit e3ca05ce authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/display: convert power map to struct intel_display 



Going forward, struct intel_display is the main device data structure
for display. Convert the power map code to it.

Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9df6b67914cd5afe7107c8431e8c475794b62298.1732808222.git.jani.nikula@intel.com
parent 3987e35d

drivers/gpu/drm/i915/display/intel_display_power_map.c

+28 −28
Original line number Diff line number Diff line
@@ -1752,9 +1752,9 @@ __set_power_wells(struct i915_power_domains *power_domains, 
		  const struct i915_power_well_desc_list *power_well_descs,

		  int power_well_descs_sz)

{

	struct drm_i915_private *i915 = container_of(power_domains,

						     struct drm_i915_private,

						     display.power.domains);

	struct intel_display *display = container_of(power_domains,

						     struct intel_display,

						     power.domains);

	u64 power_well_ids = 0;

	const struct i915_power_well_desc_list *desc_list;

	const struct i915_power_well_desc *desc;
@@ -1778,7 +1778,7 @@ __set_power_wells(struct i915_power_domains *power_domains, 
		enum i915_power_well_id id = inst->id;



		pw->desc = desc;

		drm_WARN_ON(&i915->drm,

		drm_WARN_ON(display->drm,

			    overflows_type(inst - desc->instances->list, pw->instance_idx));

		pw->instance_idx = inst - desc->instances->list;
@@ -1789,8 +1789,8 @@ __set_power_wells(struct i915_power_domains *power_domains, 
		if (id == DISP_PW_ID_NONE)

			continue;



		drm_WARN_ON(&i915->drm, id >= sizeof(power_well_ids) * 8);

		drm_WARN_ON(&i915->drm, power_well_ids & BIT_ULL(id));

		drm_WARN_ON(display->drm, id >= sizeof(power_well_ids) * 8);

		drm_WARN_ON(display->drm, power_well_ids & BIT_ULL(id));

		power_well_ids |= BIT_ULL(id);

	}
@@ -1811,53 +1811,53 @@ __set_power_wells(struct i915_power_domains *power_domains, 
 */

int intel_display_power_map_init(struct i915_power_domains *power_domains)

{

	struct drm_i915_private *i915 = container_of(power_domains,

						     struct drm_i915_private,

						     display.power.domains);

	struct intel_display *display = container_of(power_domains,

						     struct intel_display,

						     power.domains);

	/*

	 * The enabling order will be from lower to higher indexed wells,

	 * the disabling order is reversed.

	 */

	if (!HAS_DISPLAY(i915)) {

	if (!HAS_DISPLAY(display)) {

		power_domains->power_well_count = 0;

		return 0;

	}



	if (DISPLAY_VER(i915) >= 30)

	if (DISPLAY_VER(display) >= 30)

		return set_power_wells(power_domains, xe3lpd_power_wells);

	else if (DISPLAY_VER(i915) >= 20)

	else if (DISPLAY_VER(display) >= 20)

		return set_power_wells(power_domains, xe2lpd_power_wells);

	else if (DISPLAY_VER(i915) >= 14)

	else if (DISPLAY_VER(display) >= 14)

		return set_power_wells(power_domains, xelpdp_power_wells);

	else if (IS_DG2(i915))

	else if (display->platform.dg2)

		return set_power_wells(power_domains, xehpd_power_wells);

	else if (DISPLAY_VER(i915) >= 13)

	else if (DISPLAY_VER(display) >= 13)

		return set_power_wells(power_domains, xelpd_power_wells);

	else if (IS_DG1(i915))

	else if (display->platform.dg1)

		return set_power_wells(power_domains, dg1_power_wells);

	else if (IS_ALDERLAKE_S(i915))

	else if (display->platform.alderlake_s)

		return set_power_wells(power_domains, adls_power_wells);

	else if (IS_ROCKETLAKE(i915))

	else if (display->platform.rocketlake)

		return set_power_wells(power_domains, rkl_power_wells);

	else if (DISPLAY_VER(i915) == 12)

	else if (DISPLAY_VER(display) == 12)

		return set_power_wells(power_domains, tgl_power_wells);

	else if (DISPLAY_VER(i915) == 11)

	else if (DISPLAY_VER(display) == 11)

		return set_power_wells(power_domains, icl_power_wells);

	else if (IS_GEMINILAKE(i915))

	else if (display->platform.geminilake)

		return set_power_wells(power_domains, glk_power_wells);

	else if (IS_BROXTON(i915))

	else if (display->platform.broxton)

		return set_power_wells(power_domains, bxt_power_wells);

	else if (DISPLAY_VER(i915) == 9)

	else if (DISPLAY_VER(display) == 9)

		return set_power_wells(power_domains, skl_power_wells);

	else if (IS_CHERRYVIEW(i915))

	else if (display->platform.cherryview)

		return set_power_wells(power_domains, chv_power_wells);

	else if (IS_BROADWELL(i915))

	else if (display->platform.broadwell)

		return set_power_wells(power_domains, bdw_power_wells);

	else if (IS_HASWELL(i915))

	else if (display->platform.haswell)

		return set_power_wells(power_domains, hsw_power_wells);

	else if (IS_VALLEYVIEW(i915))

	else if (display->platform.valleyview)

		return set_power_wells(power_domains, vlv_power_wells);

	else if (IS_I830(i915))

	else if (display->platform.i830)

		return set_power_wells(power_domains, i830_power_wells);

	else

		return set_power_wells(power_domains, i9xx_power_wells);