Commit e3ca96e4 authored by Tony Luck's avatar Tony Luck Committed by Borislav Petkov (AMD)
Browse files

x86/resctrl: Pass domain to target CPU 



reset_all_ctrls() and resctrl_arch_update_domains() use on_each_cpu_mask()
to call rdt_ctrl_update() on potentially one CPU from each domain.

But this means rdt_ctrl_update() needs to figure out which domain to
apply changes to. Doing so requires a search of all domains in a resource,
which can only be done safely if cpus_lock is held. Both callers do hold
this lock, but there isn't a way for a function called on another CPU
via IPI to verify this.

Commit

  c0d848fc ("x86/resctrl: Remove lockdep annotation that triggers
  false positive")

removed the incorrect assertions.

Add the target domain to the msr_param structure and call
rdt_ctrl_update() for each domain separately using
smp_call_function_single(). This means that rdt_ctrl_update() doesn't
need to search for the domain and get_domain_from_cpu() can safely
assert that the cpus_lock is held since the remaining callers do not use
IPI.

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: default avatarReinette Chatre <reinette.chatre@intel.com>
Reviewed-by: default avatarJames Morse <james.morse@arm.com>
Reviewed-by: default avatarBabu Moger <babu.moger@amd.com>
Tested-by: default avatarMaciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Link: https://lore.kernel.org/r/20240308213846.77075-2-tony.luck@intel.com
parent ed30a4a5

arch/x86/kernel/cpu/resctrl/core.c

+6 −11
Original line number Diff line number Diff line
@@ -362,6 +362,8 @@ struct rdt_domain *get_domain_from_cpu(int cpu, struct rdt_resource *r) 
{

	struct rdt_domain *d;



	lockdep_assert_cpus_held();



	list_for_each_entry(d, &r->domains, list) {

		/* Find the domain that contains this CPU */

		if (cpumask_test_cpu(cpu, &d->cpu_mask))
@@ -378,19 +380,11 @@ u32 resctrl_arch_get_num_closid(struct rdt_resource *r) 


void rdt_ctrl_update(void *arg)

{

	struct rdt_hw_resource *hw_res;

	struct msr_param *m = arg;

	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(m->res);

	struct rdt_resource *r = m->res;

	int cpu = smp_processor_id();

	struct rdt_domain *d;



	d = get_domain_from_cpu(cpu, r);

	if (d) {

		hw_res->msr_update(d, m, r);

		return;

	}

	pr_warn_once("cpu %d not found in any domain for resource %s\n",

		     cpu, r->name);

	hw_res = resctrl_to_arch_res(m->res);

	hw_res->msr_update(m->dom, m, m->res);

}



/*
@@ -463,6 +457,7 @@ static int domain_setup_ctrlval(struct rdt_resource *r, struct rdt_domain *d) 
	hw_dom->ctrl_val = dc;

	setup_default_ctrlval(r, dc);



	m.dom = d;

	m.low = 0;

	m.high = hw_res->num_closid;

	hw_res->msr_update(d, &m, r);

arch/x86/kernel/cpu/resctrl/ctrlmondata.c

+7 −31
Original line number Diff line number Diff line
@@ -272,22 +272,6 @@ static u32 get_config_index(u32 closid, enum resctrl_conf_type type) 
	}

}



static bool apply_config(struct rdt_hw_domain *hw_dom,

			 struct resctrl_staged_config *cfg, u32 idx,

			 cpumask_var_t cpu_mask)

{

	struct rdt_domain *dom = &hw_dom->d_resctrl;



	if (cfg->new_ctrl != hw_dom->ctrl_val[idx]) {

		cpumask_set_cpu(cpumask_any(&dom->cpu_mask), cpu_mask);

		hw_dom->ctrl_val[idx] = cfg->new_ctrl;



		return true;

	}



	return false;

}



int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d,

			    u32 closid, enum resctrl_conf_type t, u32 cfg_val)

{
@@ -302,6 +286,7 @@ int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d, 
	hw_dom->ctrl_val[idx] = cfg_val;



	msr_param.res = r;

	msr_param.dom = d;

	msr_param.low = idx;

	msr_param.high = idx + 1;

	hw_res->msr_update(d, &msr_param, r);
@@ -315,48 +300,39 @@ int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid) 
	struct rdt_hw_domain *hw_dom;

	struct msr_param msr_param;

	enum resctrl_conf_type t;

	cpumask_var_t cpu_mask;

	struct rdt_domain *d;

	u32 idx;



	/* Walking r->domains, ensure it can't race with cpuhp */

	lockdep_assert_cpus_held();



	if (!zalloc_cpumask_var(&cpu_mask, GFP_KERNEL))

		return -ENOMEM;



	msr_param.res = NULL;

	list_for_each_entry(d, &r->domains, list) {

		hw_dom = resctrl_to_arch_dom(d);

		msr_param.res = NULL;

		for (t = 0; t < CDP_NUM_TYPES; t++) {

			cfg = &hw_dom->d_resctrl.staged_config[t];

			if (!cfg->have_new_ctrl)

				continue;



			idx = get_config_index(closid, t);

			if (!apply_config(hw_dom, cfg, idx, cpu_mask))

			if (cfg->new_ctrl == hw_dom->ctrl_val[idx])

				continue;

			hw_dom->ctrl_val[idx] = cfg->new_ctrl;



			if (!msr_param.res) {

				msr_param.low = idx;

				msr_param.high = msr_param.low + 1;

				msr_param.res = r;

				msr_param.dom = d;

			} else {

				msr_param.low = min(msr_param.low, idx);

				msr_param.high = max(msr_param.high, idx + 1);

			}

		}

		if (msr_param.res)

			smp_call_function_any(&d->cpu_mask, rdt_ctrl_update, &msr_param, 1);

	}



	if (cpumask_empty(cpu_mask))

		goto done;



	/* Update resource control msr on all the CPUs. */

	on_each_cpu_mask(cpu_mask, rdt_ctrl_update, &msr_param, 1);



done:

	free_cpumask_var(cpu_mask);



	return 0;

}

arch/x86/kernel/cpu/resctrl/internal.h

+2 −0
Original line number Diff line number Diff line
@@ -379,11 +379,13 @@ static inline struct rdt_hw_domain *resctrl_to_arch_dom(struct rdt_domain *r) 
/**

 * struct msr_param - set a range of MSRs from a domain

 * @res:       The resource to use

 * @dom:       The domain to update

 * @low:       Beginning index from base MSR

 * @high:      End index

 */

struct msr_param {

	struct rdt_resource	*res;

	struct rdt_domain	*dom;

	u32			low;

	u32			high;

};

arch/x86/kernel/cpu/resctrl/rdtgroup.c

+2 −10
Original line number Diff line number Diff line
@@ -2813,16 +2813,12 @@ static int reset_all_ctrls(struct rdt_resource *r) 
	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);

	struct rdt_hw_domain *hw_dom;

	struct msr_param msr_param;

	cpumask_var_t cpu_mask;

	struct rdt_domain *d;

	int i;



	/* Walking r->domains, ensure it can't race with cpuhp */

	lockdep_assert_cpus_held();



	if (!zalloc_cpumask_var(&cpu_mask, GFP_KERNEL))

		return -ENOMEM;



	msr_param.res = r;

	msr_param.low = 0;

	msr_param.high = hw_res->num_closid;
@@ -2834,17 +2830,13 @@ static int reset_all_ctrls(struct rdt_resource *r) 
	 */

	list_for_each_entry(d, &r->domains, list) {

		hw_dom = resctrl_to_arch_dom(d);

		cpumask_set_cpu(cpumask_any(&d->cpu_mask), cpu_mask);



		for (i = 0; i < hw_res->num_closid; i++)

			hw_dom->ctrl_val[i] = r->default_ctrl;

		msr_param.dom = d;

		smp_call_function_any(&d->cpu_mask, rdt_ctrl_update, &msr_param, 1);

	}



	/* Update CBM on all the CPUs in cpu_mask */

	on_each_cpu_mask(cpu_mask, rdt_ctrl_update, &msr_param, 1);



	free_cpumask_var(cpu_mask);



	return 0;

}