Commit e3de58f8 authored by Rajneesh Bhardwaj's avatar Rajneesh Bhardwaj Committed by Alex Deucher
Browse files

drm/amdkfd: update SIMD distribution algo for GFXIP 9.4.2 onwards 



In certain cooperative group dispatch scenarios the default SPI resource
allocation may cause reduced per-CU workgroup occupancy. Set
COMPUTE_RESOURCE_LIMITS.FORCE_SIMD_DIST=1 to mitigate soft hang
scenarions.

Reviewed-by: default avatarFelix Kuehling <felix.kuehling@amd.com>
Suggested-by: default avatarJoseph Greathouse <Joseph.Greathouse@amd.com>
Signed-off-by: default avatarRajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0d555e48

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c

+9 −0
Original line number Diff line number Diff line
@@ -303,6 +303,15 @@ static void update_mqd(struct mqd_manager *mm, void *mqd, 
		update_cu_mask(mm, mqd, minfo, 0);

	set_priority(m, q);



	if (minfo && KFD_GC_VERSION(mm->dev) >= IP_VERSION(9, 4, 2)) {

		if (minfo->update_flag & UPDATE_FLAG_IS_GWS)

			m->compute_resource_limits |=

				COMPUTE_RESOURCE_LIMITS__FORCE_SIMD_DIST_MASK;

		else

			m->compute_resource_limits &=

				~COMPUTE_RESOURCE_LIMITS__FORCE_SIMD_DIST_MASK;

	}



	q->is_active = QUEUE_IS_ACTIVE(*q);

}

drivers/gpu/drm/amd/amdkfd/kfd_priv.h

+1 −0
Original line number Diff line number Diff line
@@ -532,6 +532,7 @@ struct queue_properties { 
enum mqd_update_flag {

	UPDATE_FLAG_DBG_WA_ENABLE = 1,

	UPDATE_FLAG_DBG_WA_DISABLE = 2,

	UPDATE_FLAG_IS_GWS = 4, /* quirk for gfx9 IP */

};



struct mqd_update_info {

drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c

+3 −1
Original line number Diff line number Diff line
@@ -95,6 +95,7 @@ void kfd_process_dequeue_from_device(struct kfd_process_device *pdd) 
int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid,

			void *gws)

{

	struct mqd_update_info minfo = {0};

	struct kfd_node *dev = NULL;

	struct process_queue_node *pqn;

	struct kfd_process_device *pdd;
@@ -146,9 +147,10 @@ int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid, 
	}



	pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0;

	minfo.update_flag = gws ? UPDATE_FLAG_IS_GWS : 0;



	return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,

							pqn->q, NULL);

							pqn->q, &minfo);

}



void kfd_process_dequeue_from_all_devices(struct kfd_process *p)