Unverified Commit e46957f2 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Mark Brown
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ASoC: dt-bindings: qcom: add LPASS LPI MI2S dai ids 



Add new dai ids entries for LPASS LPI MI2S and SENARY MI2S audio lines.

Co-developed-by: default avatarMohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Signed-off-by: default avatarMohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260402081118.348071-7-srinivas.kandagatla@oss.qualcomm.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent cab45ab9

Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml

+4 −1
Original line number Diff line number Diff line
@@ -126,13 +126,16 @@ patternProperties: 
            reg:

              contains:

                # MI2S DAI ID range PRIMARY_MI2S_RX - QUATERNARY_MI2S_TX and

                # QUINARY_MI2S_RX - QUINARY_MI2S_TX

                # QUINARY_MI2S_RX - QUINARY_MI2S_TX and

                # LPI_MI2S_RX_0 - SENARY_MI2S_TX

                items:

                  oneOf:

                    - minimum: 16

                      maximum: 23

                    - minimum: 127

                      maximum: 128

                    - minimum: 137

                      maximum: 148

        then:

          required:

            - qcom,sd-lines

include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h

+12 −0
Original line number Diff line number Diff line
@@ -140,6 +140,18 @@ 
#define DISPLAY_PORT_RX_6	134

#define DISPLAY_PORT_RX_7	135

#define USB_RX			136

#define LPI_MI2S_RX_0		137

#define LPI_MI2S_TX_0		138

#define LPI_MI2S_RX_1		139

#define LPI_MI2S_TX_1		140

#define LPI_MI2S_RX_2		141

#define LPI_MI2S_TX_2		142

#define LPI_MI2S_RX_3		143

#define LPI_MI2S_TX_3		144

#define LPI_MI2S_RX_4		145

#define LPI_MI2S_TX_4		146

#define SENARY_MI2S_RX		147

#define SENARY_MI2S_TX		148



#define LPASS_CLK_ID_PRI_MI2S_IBIT	1

#define LPASS_CLK_ID_PRI_MI2S_EBIT	2