Commit e482d9e3 authored by Anup Patel's avatar Anup Patel Committed by Anup Patel
Browse files

RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config() 



The reg_val check in kvm_riscv_vcpu_set_reg_config() should only
be done for isa config register.

Fixes: 9bfd900b ("RISC-V: KVM: Improve ISA extension by using a bitmap")
Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarAtish Patra <atishp@rivosinc.com>
Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent 3e2d4756

arch/riscv/kvm/vcpu.c

+7 −4
Original line number Diff line number Diff line
@@ -296,12 +296,15 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, 
	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))

		return -EFAULT;



	/* This ONE REG interface is only defined for single letter extensions */

	switch (reg_num) {

	case KVM_REG_RISCV_CONFIG_REG(isa):

		/*

		 * This ONE REG interface is only defined for

		 * single letter extensions.

		 */

		if (fls(reg_val) >= RISCV_ISA_EXT_BASE)

			return -EINVAL;



	switch (reg_num) {

	case KVM_REG_RISCV_CONFIG_REG(isa):

		if (!vcpu->arch.ran_atleast_once) {

			/* Ignore the enable/disable request for certain extensions */

			for (i = 0; i < RISCV_ISA_EXT_BASE; i++) {