Unverified Commit e49ad667 authored by Matt Ranostay's avatar Matt Ranostay Committed by Krzysztof Wilczyński
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PCI: j721e: Add TI J784S4 PCIe configuration 

Add PCIe configuration for J784S4 SoC platform which has 4x lane
support.

Link: https://lore.kernel.org/linux-pci/20231128054402.2155183-6-s-vadapalli@ti.com


Tested-by: default avatarAchal Verma <a-verma1@ti.com>
Signed-off-by: default avatarMatt Ranostay <mranostay@ti.com>
Signed-off-by: default avatarAchal Verma <a-verma1@ti.com>
Signed-off-by: default avatarSiddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: default avatarKrzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: default avatarRoger Quadros <rogerq@kernel.org>
parent 4490f559

drivers/pci/controller/cadence/pci-j721e.c

+22 −0
Original line number Diff line number Diff line
@@ -330,6 +330,20 @@ static const struct j721e_pcie_data am64_pcie_ep_data = { 
	.max_lanes = 1,

};



static const struct j721e_pcie_data j784s4_pcie_rc_data = {

	.mode = PCI_MODE_RC,

	.quirk_retrain_flag = true,

	.byte_access_allowed = false,

	.linkdown_irq_regfield = LINK_DOWN,

	.max_lanes = 4,

};



static const struct j721e_pcie_data j784s4_pcie_ep_data = {

	.mode = PCI_MODE_EP,

	.linkdown_irq_regfield = LINK_DOWN,

	.max_lanes = 4,

};



static const struct of_device_id of_j721e_pcie_match[] = {

	{

		.compatible = "ti,j721e-pcie-host",
@@ -355,6 +369,14 @@ static const struct of_device_id of_j721e_pcie_match[] = { 
		.compatible = "ti,am64-pcie-ep",

		.data = &am64_pcie_ep_data,

	},

	{

		.compatible = "ti,j784s4-pcie-host",

		.data = &j784s4_pcie_rc_data,

	},

	{

		.compatible = "ti,j784s4-pcie-ep",

		.data = &j784s4_pcie_ep_data,

	},

	{},

};