Unverified Commit e4eac34f authored by Nam Cao's avatar Nam Cao Committed by Palmer Dabbelt
Browse files

riscv: drop the use of XIP_OFFSET in XIP_FIXUP_OFFSET 



XIP_OFFSET is the hard-coded offset of writable data section within the
kernel.

By hard-coding this value, the read-only section of the kernel (which is
placed before the writable data section) is restricted in size.

As a preparation to remove this hard-coded macro XIP_OFFSET entirely, stop
using XIP_OFFSET in XIP_FIXUP_OFFSET. Instead, use CONFIG_PHYS_RAM_BASE and
_sdata to do the same thing.

While at it, also add a description for XIP_FIXUP_OFFSET.

Signed-off-by: default avatarNam Cao <namcao@linutronix.de>
Reviewed-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/dba0409518b14ee83b346e099b1f7f934daf7b74.1717789719.git.namcao@linutronix.de


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 5cf08967

arch/riscv/include/asm/xip_fixup.h

+12 −2
Original line number Diff line number Diff line
@@ -9,8 +9,19 @@ 


#ifdef CONFIG_XIP_KERNEL

.macro XIP_FIXUP_OFFSET reg

        REG_L t0, _xip_fixup

	/* Fix-up address in Flash into address in RAM early during boot before

	 * MMU is up. Because generated code "thinks" data is in Flash, but it

	 * is actually in RAM (actually data is also in Flash, but Flash is

	 * read-only, thus we need to use the data residing in RAM).

	 *

	 * The start of data in Flash is _sdata and the start of data in RAM is

	 * CONFIG_PHYS_RAM_BASE. So this fix-up essentially does this:

	 * reg += CONFIG_PHYS_RAM_BASE - _start

	 */

	li t0, CONFIG_PHYS_RAM_BASE

        add \reg, \reg, t0

	la t0, _sdata

	sub \reg, \reg, t0

.endm

.macro XIP_FIXUP_FLASH_OFFSET reg

	la t0, __data_loc
@@ -19,7 +30,6 @@ 
	add \reg, \reg, t0

.endm



_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET

_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET

#else

.macro XIP_FIXUP_OFFSET reg