Commit e50086f3 authored by Matt Roper's avatar Matt Roper
Browse files

drm/i915/dg2: Drop pre-production display workarounds



All production DG2 cards have display stepping C0 or later.  We can drop
Wa_14013215631 (only applies to pre-C0) and make Wa_14010547955
unconditional (applies to everything B0 and beyond).  Also drop the
now-unused IS_DG2_DISPLAY_STEP macro.

Bspec: 44477
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Acked-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarMatt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230816214201.534095-9-matthew.d.roper@intel.com
parent 3d3e0271
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+1 −1
Original line number Diff line number Diff line
@@ -726,7 +726,7 @@ static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state)
		tmp |= UNDERRUN_RECOVERY_DISABLE_ADLP;

	/* Wa_14010547955:dg2 */
	if (IS_DG2_DISPLAY_STEP(dev_priv, STEP_B0, STEP_FOREVER))
	if (IS_DG2(dev_priv))
		tmp |= DG2_RENDER_CCSTAG_4_3_EN;

	intel_de_write(dev_priv, PIPE_CHICKEN(pipe), tmp);
+0 −4
Original line number Diff line number Diff line
@@ -2203,10 +2203,6 @@ static bool gen12_plane_has_mc_ccs(struct drm_i915_private *i915,
	if (IS_ALDERLAKE_P(i915) && IS_DISPLAY_STEP(i915, STEP_A0, STEP_B0))
		return false;

	/* Wa_14013215631 */
	if (IS_DG2_DISPLAY_STEP(i915, STEP_A0, STEP_C0))
		return false;

	return plane_id < PLANE_SPRITE4;
}

+0 −4
Original line number Diff line number Diff line
@@ -689,10 +689,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
	(IS_SUBPLATFORM(__i915, INTEL_DG2, INTEL_SUBPLATFORM_##variant) && \
	 IS_GRAPHICS_STEP(__i915, since, until))

#define IS_DG2_DISPLAY_STEP(__i915, since, until) \
	(IS_DG2(__i915) && \
	 IS_DISPLAY_STEP(__i915, since, until))

#define IS_PVC_BD_STEP(__i915, since, until) \
	(IS_PONTEVECCHIO(__i915) && \
	 IS_BASEDIE_STEP(__i915, since, until))