Commit e55feea3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull SoC fixes from Arnd Bergmann:
 "The main code change is a revert of the Raspberry Pi RP1 overlay
  support that was decided to not be ready.

  The other fixes are all for devicetree sources:

   - ethernet configuration on ixp42x-actiontec-mi424wr is board
     revision specific

   - validation warning fixes for imx27/imx51/imx6, hikey960 and k3

   - Minor corrections across imx8 boards, addressing all types of
     issues with interrups, dma, ethernet and clock settings, all simple
     one-line changes"

* tag 'soc-fixes-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits)
  arm64: dts: hisilicon: hikey960: Drop "snps,gctl-reset-quirk" and "snps,tx_de_emphasis*" properties
  Documentation/process: maintainer-soc: Mark 'make' as commands
  Documentation/process: maintainer-soc: Be more explicit about defconfig
  arm64: dts: mba8mx: Fix Ethernet PHY IRQ support
  arm64: dts: imx8qm-ss-dma: correct the dma channels of lpuart
  arm64: dts: imx8mp: Fix LAN8740Ai PHY reference clock on DH electronics i.MX8M Plus DHCOM
  arm64: dts: freescale: tx8p-ml81: fix eqos nvmem-cells
  arm64: dts: freescale: moduline-display: fix compatible
  dt-bindings: arm: fsl: moduline-display: fix compatible
  ARM: dts: imx6q-ba16: fix RTC interrupt level
  arm64: dts: freescale: imx95-toradex-smarc: fix SMARC_SDIO_WP label position
  arm64: dts: freescale: imx95-toradex-smarc: use edge trigger for ethphy1 interrupt
  arm64: dts: add off-on-delay-us for usdhc2 regulator
  arm64: dts: imx8qm-mek: correct the light sensor interrupt type to low level
  ARM: dts: nxp: imx: Fix mc13xxx LED node names
  arm64: dts: imx95: correct I3C2 pclk to IMX95_CLK_BUSWAKEUP
  MAINTAINERS: Fix a linusw mail address
  arm64: dts: broadcom: rp1: drop RP1 overlay
  arm64: dts: broadcom: bcm2712: fix RP1 endpoint PCI topology
  misc: rp1: drop overlay support
  ...
parents 4621c338 bf104037
Loading
Loading
Loading
Loading
+8 −1
Original line number Diff line number Diff line
@@ -1105,7 +1105,6 @@ properties:
              - gateworks,imx8mp-gw74xx   # i.MX8MP Gateworks Board
              - gateworks,imx8mp-gw75xx-2x # i.MX8MP Gateworks Board
              - gateworks,imx8mp-gw82xx-2x # i.MX8MP Gateworks Board
              - gocontroll,moduline-display # GOcontroll Moduline Display controller
              - prt,prt8ml             # Protonic PRT8ML
              - skov,imx8mp-skov-basic # SKOV i.MX8MP baseboard without frontplate
              - skov,imx8mp-skov-revb-hdmi # SKOV i.MX8MP climate control without panel
@@ -1164,6 +1163,14 @@ properties:
          - const: engicam,icore-mx8mp             # i.MX8MP Engicam i.Core MX8M Plus SoM
          - const: fsl,imx8mp

      - description: Ka-Ro TX8P-ML81 SoM based boards
        items:
          - enum:
              - gocontroll,moduline-display
              - gocontroll,moduline-display-106
          - const: karo,tx8p-ml81
          - const: fsl,imx8mp

      - description: Kontron i.MX8MP OSM-S SoM based Boards
        items:
          - const: kontron,imx8mp-bl-osm-s  # Kontron BL i.MX8MP OSM-S Board
+7 −1
Original line number Diff line number Diff line
@@ -25,6 +25,10 @@ properties:
    items:
      - const: pci1de4,1

  reg:
    maxItems: 1
    description: The PCI Bus-Device-Function address.

  '#interrupt-cells':
    const: 2
    description: |
@@ -101,6 +105,7 @@ unevaluatedProperties: false

required:
  - compatible
  - reg
  - '#interrupt-cells'
  - interrupt-controller
  - pci-ep-bus@1
@@ -111,8 +116,9 @@ examples:
        #address-cells = <3>;
        #size-cells = <2>;

        rp1@0,0 {
        dev@0,0 {
            compatible = "pci1de4,1";
            reg = <0x10000 0x0 0x0 0x0 0x0>;
            ranges = <0x01 0x00 0x00000000  0x82010000 0x00 0x00  0x00 0x400000>;
            #address-cells = <3>;
            #size-cells = <2>;
+6 −4
Original line number Diff line number Diff line
@@ -57,8 +57,10 @@ Submitting Patches for Given SoC

All typical platform related patches should be sent via SoC submaintainers
(platform-specific maintainers).  This includes also changes to per-platform or
shared defconfigs (scripts/get_maintainer.pl might not provide correct
addresses in such case).
shared defconfigs. Note that scripts/get_maintainer.pl might not provide
correct addresses for the shared defconfig, so ignore its output and manually
create CC-list based on MAINTAINERS file or use something like
``scripts/get_maintainer.pl -f drivers/soc/FOO/``).

Submitting Patches to the Main SoC Maintainers
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -114,9 +116,9 @@ coordinating how the changes get merged through different maintainer trees.
Usually the branch that includes a driver change will also include the
corresponding change to the devicetree binding description, to ensure they are
in fact compatible.  This means that the devicetree branch can end up causing
warnings in the "make dtbs_check" step.  If a devicetree change depends on
warnings in the ``make dtbs_check`` step.  If a devicetree change depends on
missing additions to a header file in include/dt-bindings/, it will fail the
"make dtbs" step and not get merged.
``make dtbs`` step and not get merged.

There are multiple ways to deal with this:

+1 −1
Original line number Diff line number Diff line
@@ -2012,7 +2012,7 @@ ARM AND ARM64 SoC SUB-ARCHITECTURES (COMMON PARTS)
M:	Arnd Bergmann <arnd@arndb.de>
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Alexandre Belloni <alexandre.belloni@bootlin.com>
M:	Linus Walleij <linus.walleij@linaro.org>
M:	Linus Walleij <linusw@kernel.org>
R:	Drew Fustini <fustini@kernel.org>
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L:	soc@lists.linux.dev
+11 −0
Original line number Diff line number Diff line
@@ -12,6 +12,17 @@ / {
	model = "Actiontec MI424WR rev A/C";
	compatible = "actiontec,mi424wr-ac", "intel,ixp42x";

	/* Connect the switch to EthC */
	spi {
		ethernet-switch@0 {
			ethernet-ports {
				ethernet-port@4 {
					ethernet = <&ethc>;
				};
			};
		};
	};

	soc {
		/* EthB used for WAN */
		ethernet@c8009000 {
Loading