Commit e58acb76 authored by shaoyunl's avatar shaoyunl Committed by Alex Deucher
Browse files

drm/amdgpu : Add mes_log_enable to control mes log feature 



The MES log might slow down the performance for extra step of log the data,
disable it by default and introduce a parameter can enable it when necessary

Signed-off-by: default avatarshaoyunl <shaoyun.liu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fedb6ae4

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -210,6 +210,7 @@ extern int amdgpu_async_gfx_ring; 
extern int amdgpu_mcbp;

extern int amdgpu_discovery;

extern int amdgpu_mes;

extern int amdgpu_mes_log_enable;

extern int amdgpu_mes_kiq;

extern int amdgpu_noretry;

extern int amdgpu_force_asic_type;

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+10 −0
Original line number Diff line number Diff line
@@ -195,6 +195,7 @@ int amdgpu_async_gfx_ring = 1; 
int amdgpu_mcbp = -1;

int amdgpu_discovery = -1;

int amdgpu_mes;

int amdgpu_mes_log_enable = 0;

int amdgpu_mes_kiq;

int amdgpu_noretry = -1;

int amdgpu_force_asic_type = -1;
@@ -667,6 +668,15 @@ MODULE_PARM_DESC(mes, 
	"Enable Micro Engine Scheduler (0 = disabled (default), 1 = enabled)");

module_param_named(mes, amdgpu_mes, int, 0444);



/**

 * DOC: mes_log_enable (int)

 * Enable Micro Engine Scheduler log. This is used to enable/disable MES internal log.

 * (0 = disabled (default), 1 = enabled)

 */

MODULE_PARM_DESC(mes_log_enable,

	"Enable Micro Engine Scheduler log (0 = disabled (default), 1 = enabled)");

module_param_named(mes_log_enable, amdgpu_mes_log_enable, int, 0444);



/**

 * DOC: mes_kiq (int)

 * Enable Micro Engine Scheduler KIQ. This is a new engine pipe for kiq.

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

+4 −1
Original line number Diff line number Diff line
@@ -100,6 +100,9 @@ static int amdgpu_mes_event_log_init(struct amdgpu_device *adev) 
{

	int r;



	if (!amdgpu_mes_log_enable)

		return 0;



	r = amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,

				    AMDGPU_GEM_DOMAIN_GTT,

				    &adev->mes.event_log_gpu_obj,
@@ -1561,7 +1564,7 @@ void amdgpu_debugfs_mes_event_log_init(struct amdgpu_device *adev) 
#if defined(CONFIG_DEBUG_FS)

	struct drm_minor *minor = adev_to_drm(adev)->primary;

	struct dentry *root = minor->debugfs_root;

	if (adev->enable_mes)

	if (adev->enable_mes && amdgpu_mes_log_enable)

		debugfs_create_file("amdgpu_mes_event_log", 0444, root,

				    adev, &amdgpu_debugfs_mes_event_log_fops);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

+5 −2
Original line number Diff line number Diff line
@@ -411,8 +411,11 @@ static int mes_v11_0_set_hw_resources(struct amdgpu_mes *mes) 
	mes_set_hw_res_pkt.enable_reg_active_poll = 1;

	mes_set_hw_res_pkt.enable_level_process_quantum_check = 1;

	mes_set_hw_res_pkt.oversubscription_timer = 50;

	if (amdgpu_mes_log_enable) {

		mes_set_hw_res_pkt.enable_mes_event_int_logging = 1;

	mes_set_hw_res_pkt.event_intr_history_gpu_mc_ptr = mes->event_log_gpu_addr;

		mes_set_hw_res_pkt.event_intr_history_gpu_mc_ptr =

					mes->event_log_gpu_addr;

	}



	return mes_v11_0_submit_pkt_and_poll_completion(mes,

			&mes_set_hw_res_pkt, sizeof(mes_set_hw_res_pkt),