Unverified Commit e5c06efd authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'riscv-soc-fixes-for-v6.12-rc6' of...

Merge tag 'riscv-soc-fixes-for-v6.12-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux

 into HEAD

RISC-V soc fixes for v6.12-rc6

StarFive:
Two minor dts fixes, one setting the correct eth phy delay parameters
and one disabling unused nodes that caused warnings at probe time.

Firmware:
Fix the poll_complete() implementation in the auto-update driver so that
it behaves as the framework expects.

Misc:
Update the maintainer pattern for my dts entry, so that it covers
the specific platforms listed , rather than including all riscv
platforms with the list platforms excluded.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>

* tag 'riscv-soc-fixes-for-v6.12-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  MAINTAINERS: invert Misc RISC-V SoC Support's pattern
  riscv: dts: starfive: Update ethernet phy0 delay parameter values for Star64
  riscv: dts: starfive: disable unused csi/camss nodes
  firmware: microchip: auto-update: fix poll_complete() to not report spurious timeout errors

Link: https://lore.kernel.org/r/20241031-colossal-cassette-617817c9bec3@spud


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 896dcf47 384f2024
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+4 −6
Original line number Diff line number Diff line
@@ -19786,12 +19786,10 @@ L: linux-riscv@lists.infradead.org
S:	Maintained
Q:	https://patchwork.kernel.org/project/linux-riscv/list/
T:	git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
F:	Documentation/devicetree/bindings/riscv/
F:	arch/riscv/boot/dts/
X:	arch/riscv/boot/dts/allwinner/
X:	arch/riscv/boot/dts/renesas/
X:	arch/riscv/boot/dts/sophgo/
X:	arch/riscv/boot/dts/thead/
F:	arch/riscv/boot/dts/canaan/
F:	arch/riscv/boot/dts/microchip/
F:	arch/riscv/boot/dts/sifive/
F:	arch/riscv/boot/dts/starfive/
RISC-V PMU DRIVERS
M:	Atish Patra <atishp@atishpatra.org>
+0 −2
Original line number Diff line number Diff line
@@ -128,7 +128,6 @@ &camss {
	assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
			  <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>;
	assigned-clock-rates = <49500000>, <198000000>;
	status = "okay";

	ports {
		#address-cells = <1>;
@@ -151,7 +150,6 @@ camss_from_csi2rx: endpoint {
&csi2rx {
	assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
	assigned-clock-rates = <297000000>;
	status = "okay";

	ports {
		#address-cells = <1>;
+1 −2
Original line number Diff line number Diff line
@@ -44,8 +44,7 @@ &pcie1 {
};

&phy0 {
	rx-internal-delay-ps = <1900>;
	tx-internal-delay-ps = <1500>;
	rx-internal-delay-ps = <1500>;
	motorcomm,rx-clk-drv-microamp = <2910>;
	motorcomm,rx-data-drv-microamp = <2910>;
	motorcomm,tx-clk-adj-enabled;
+7 −35
Original line number Diff line number Diff line
@@ -76,14 +76,11 @@
#define AUTO_UPDATE_INFO_SIZE		SZ_1M
#define AUTO_UPDATE_BITSTREAM_BASE	(AUTO_UPDATE_DIRECTORY_SIZE + AUTO_UPDATE_INFO_SIZE)

#define AUTO_UPDATE_TIMEOUT_MS		60000

struct mpfs_auto_update_priv {
	struct mpfs_sys_controller *sys_controller;
	struct device *dev;
	struct mtd_info *flash;
	struct fw_upload *fw_uploader;
	struct completion programming_complete;
	size_t size_per_bitstream;
	bool cancel_request;
};
@@ -156,19 +153,6 @@ static void mpfs_auto_update_cancel(struct fw_upload *fw_uploader)

static enum fw_upload_err mpfs_auto_update_poll_complete(struct fw_upload *fw_uploader)
{
	struct mpfs_auto_update_priv *priv = fw_uploader->dd_handle;
	int ret;

	/*
	 * There is no meaningful way to get the status of the programming while
	 * it is in progress, so attempting anything other than waiting for it
	 * to complete would be misplaced.
	 */
	ret = wait_for_completion_timeout(&priv->programming_complete,
					  msecs_to_jiffies(AUTO_UPDATE_TIMEOUT_MS));
	if (!ret)
		return FW_UPLOAD_ERR_TIMEOUT;

	return FW_UPLOAD_ERR_NONE;
}

@@ -349,33 +333,23 @@ static enum fw_upload_err mpfs_auto_update_write(struct fw_upload *fw_uploader,
						 u32 offset, u32 size, u32 *written)
{
	struct mpfs_auto_update_priv *priv = fw_uploader->dd_handle;
	enum fw_upload_err err = FW_UPLOAD_ERR_NONE;
	int ret;

	reinit_completion(&priv->programming_complete);

	ret = mpfs_auto_update_write_bitstream(fw_uploader, data, offset, size, written);
	if (ret) {
		err = FW_UPLOAD_ERR_RW_ERROR;
		goto out;
	}
	if (ret)
		return FW_UPLOAD_ERR_RW_ERROR;

	if (priv->cancel_request) {
		err = FW_UPLOAD_ERR_CANCELED;
		goto out;
	}
	if (priv->cancel_request)
		return FW_UPLOAD_ERR_CANCELED;

	if (mpfs_auto_update_is_bitstream_info(data, size))
		goto out;
		return FW_UPLOAD_ERR_NONE;

	ret = mpfs_auto_update_verify_image(fw_uploader);
	if (ret)
		err = FW_UPLOAD_ERR_FW_INVALID;

out:
	complete(&priv->programming_complete);
		return FW_UPLOAD_ERR_FW_INVALID;

	return err;
	return FW_UPLOAD_ERR_NONE;
}

static const struct fw_upload_ops mpfs_auto_update_ops = {
@@ -461,8 +435,6 @@ static int mpfs_auto_update_probe(struct platform_device *pdev)
		return dev_err_probe(dev, ret,
				     "The current bitstream does not support auto-update\n");

	init_completion(&priv->programming_complete);

	fw_uploader = firmware_upload_register(THIS_MODULE, dev, "mpfs-auto-update",
					       &mpfs_auto_update_ops, priv);
	if (IS_ERR(fw_uploader))