Commit e5cea3c8 authored by Conor Dooley's avatar Conor Dooley Committed by Linus Walleij
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MAINTAINERS: add Microchip RISC-V pinctrl drivers/bindings to entry 



Add the new gpio2 and iomux0 drivers and bindings to the existing entry
for Microchip RISC-V devices.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 46397274

MAINTAINERS

+4 −0
Original line number Diff line number Diff line
@@ -22089,6 +22089,8 @@ F: Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml 
F:	Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml

F:	Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml

F:	Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml

F:	Documentation/devicetree/bindings/pinctrl/microchip,mpfs-pinctrl-iomux0.yaml

F:	Documentation/devicetree/bindings/pinctrl/microchip,pic64gx-pinctrl-gpio2.yaml

F:	Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml

F:	Documentation/devicetree/bindings/riscv/microchip.yaml

F:	Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml
@@ -22102,6 +22104,8 @@ F: drivers/gpio/gpio-mpfs.c 
F:	drivers/i2c/busses/i2c-microchip-corei2c.c

F:	drivers/mailbox/mailbox-mpfs.c

F:	drivers/pci/controller/plda/pcie-microchip-host.c

F:	drivers/pinctrl/pinctrl-mpfs-iomux0.c

F:	drivers/pinctrl/pinctrl-pic64gx-gpio2.c

F:	drivers/pwm/pwm-microchip-core.c

F:	drivers/reset/reset-mpfs.c

F:	drivers/rtc/rtc-mpfs.c